公开(公告)号：US20240237333A9

公开(公告)日：2024-07-11

申请号：US18220861

申请日：2023-07-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jul Pin PARK ,  Jae Joon SONG ,  Heon Jun HA ,  Dong-Sik PARK

IPC: H10B12/00 ,  H01L23/528

CPC classification number: H10B12/482 ,  H01L23/5283 ,  H10B12/315 ,  H10B12/485 ,  H10B12/488 ,  H10B12/50

Abstract: Disclosed is a semiconductor memory device including a peripheral gate structure on a substrate, bitlines disposed on the peripheral gate structure and extending in a first direction, a protruding insulating pattern including channel trenches, extending in a second direction intersecting the first direction, channel structures disposed on the bitlines in the channel trenches and including a metal oxide, first wordlines disposed on the channel structures and extending in the second direction, second wordlines disposed on the channel structures, extending in the second direction, and spaced apart from the first wordlines in the first direction, landing pads disposed on the channel structures and connected to the channel structures, pad separation patterns disposed on the protruding insulating pattern and separating the landing pads, first passage patterns connected to the protruding insulating pattern through pad separation patterns and formed of an oxide-based insulating material, and data storage patterns disposed on the landing pads.

公开(公告)号：US20240138142A1

公开(公告)日：2024-04-25

申请号：US18220861

申请日：2023-07-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jul Pin PARK ,  Jae Joon SONG ,  Heon Jun HA ,  Dong-Sik PARK

IPC: H10B12/00 ,  H01L23/528

CPC classification number: H10B12/482 ,  H01L23/5283 ,  H10B12/315 ,  H10B12/485 ,  H10B12/488 ,  H10B12/50

Abstract: Disclosed is a semiconductor memory device including a peripheral gate structure on a substrate, bitlines disposed on the peripheral gate structure and extending in a first direction, a protruding insulating pattern including channel trenches, extending in a second direction intersecting the first direction, channel structures disposed on the bitlines in the channel trenches and including a metal oxide, first wordlines disposed on the channel structures and extending in the second direction, second wordlines disposed on the channel structures, extending in the second direction, and spaced apart from the first wordlines in the first direction, landing pads disposed on the channel structures and connected to the channel structures, pad separation patterns disposed on the protruding insulating pattern and separating the landing pads, first passage patterns connected to the protruding insulating pattern through pad separation patterns and formed of an oxide-based insulating material, and data storage patterns disposed on the landing pads.