公开(公告)号：US20140101395A1

公开(公告)日：2014-04-10

申请号：US14038932

申请日：2013-09-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae Joong Song ,  Gyu Hong Kim ,  Jae Ho Park ,  Gi Young Yang ,  Jong Hoon Jung

IPC: G11C7/12 ,  G06F12/00

CPC classification number: G11C7/12 ,  G06F12/00 ,  G11C11/419

Abstract: Semiconductor memory devices are provided. Each of the semiconductor memory devices may include first and second memory cells. The first memory cell may be connected to a bit line and a complementary bit line. Moreover, each of the semiconductor memory devices may include a discharge circuit connected to the first memory cell via the bit line and the complementary bit line. The discharge circuit may be configured to discharge the first memory cell during a read or write operation of the second memory cell.

Abstract translation: 提供半导体存储器件。 每个半导体存储器件可以包括第一和第二存储单元。 第一存储单元可以连接到位线和互补位线。 此外，每个半导体存储器件可以包括通过位线和互补位线连接到第一存储单元的放电电路。 放电电路可以被配置为在第二存储单元的读取或写入操作期间对第一存储单元进行放电。

公开(公告)号：US09087566B2

公开(公告)日：2015-07-21

申请号：US14038932

申请日：2013-09-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Tae Joong Song ,  Gyu Hong Kim ,  Jae Ho Park ,  Gi Young Yang ,  Jong Hoon Jung

IPC: G06F12/00 ,  G11C7/12 ,  G11C11/419

CPC classification number: G11C7/12 ,  G06F12/00 ,  G11C11/419

Abstract: Semiconductor memory devices are provided. Each of the semiconductor memory devices may include first and second memory cells. The first memory cell may be connected to a bit line and a complementary bit line. Moreover, each of the semiconductor memory devices may include a discharge circuit connected to the first memory cell via the bit line and the complementary bit line. The discharge circuit may be configured to discharge the first memory cell during a read or write operation of the second memory cell.

Abstract translation: 提供半导体存储器件。 每个半导体存储器件可以包括第一和第二存储单元。 第一存储单元可以连接到位线和互补位线。 此外，每个半导体存储器件可以包括通过位线和互补位线连接到第一存储单元的放电电路。 放电电路可以被配置为在第二存储单元的读取或写入操作期间对第一存储单元进行放电。