公开(公告)号：US20240421190A1

公开(公告)日：2024-12-19

申请号：US18624253

申请日：2024-04-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seong Heum Choi ,  Gi Woong Shim ,  Rak Hwan Kim ,  Do Sun Lee ,  Hyo Seok Choi

IPC: H01L29/06 ,  H01L23/532 ,  H01L29/08 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

Abstract: A semiconductor device may include a substrate, an active pattern extending in a first horizontal direction on the substrate, a gate electrode extending in a second horizontal direction different from the first horizontal direction on the active pattern, a source/drain region on at least a first side of the gate electrode on the active pattern, and a source/drain contact connected to the source/drain region on the first side of the gate electrode. The source/drain contact may include first, second, and third layers which are sequentially stacked, the first to third layers including the same metal, with each layer having a respective crystal orientation. The source/drain contact may include a first grain boundary at an interface between the first layer and the second layer, and a second grain boundary at an interface between the second layer and the third layer.