公开(公告)号：US20150076649A1

公开(公告)日：2015-03-19

申请号：US14486389

申请日：2014-09-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sung-kwan KIM ,  Doo-Won Kwon ,  Jeong-ki Kim ,  Wook-hwan Kim ,  Byung-jun Park ,  Seung-hun Shin ,  June-taeg Lee ,  Ha-kyu Choi ,  Tae-Seok Oh

IPC: H01L27/146

CPC classification number: H01L27/14643 ,  H01L24/80 ,  H01L27/14609 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/1463 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1464 ,  H01L27/14687 ,  H01L27/14689 ,  H01L27/1469 ,  H01L2224/05547 ,  H01L2224/08121 ,  H01L2224/80895 ,  H01L2224/80896

Abstract: An electronic device may include a first semiconductor layer, a first electrode layer on the semiconductor layer, an adhesive insulating layer on the first electrode layer, a second electrode layer on the adhesive insulating layer, a second semiconductor layer. The first electrode layer may include a first plurality of electrodes, the first electrode layer may be between the adhesive insulating layer and the first semiconductor layer, and the adhesive insulating layer may include at least one of SiOCN, SiBN, and/or BN. The second electrode layer may include a second plurality of electrodes, the adhesive insulating layer may be between the first and second electrode layers, and the second electrode layer may be between the adhesive insulating layer and the second semiconductor layer.

Abstract translation: 电子器件可以包括第一半导体层，半导体层上的第一电极层，第一电极层上的粘合绝缘层，粘合绝缘层上的第二电极层，第二半导体层。 第一电极层可以包括第一多个电极，第一电极层可以在粘合绝缘层和第一半导体层之间，并且粘合绝缘层可以包括SiOCN，SiBN和/或BN中的至少一种。 第二电极层可以包括第二多个电极，粘合绝缘层可以在第一和第二电极层之间，并且第二电极层可以在粘合绝缘层和第二半导体层之间。

公开(公告)号：US09209214B2

公开(公告)日：2015-12-08

申请号：US13893592

申请日：2013-05-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Doo-Won Kwon ,  June-Mo Koo ,  Yun-Ki Lee ,  Se-Hoon Jang

IPC: H01L27/146 ,  H01L27/144

CPC classification number: H01L27/1463 ,  H01L27/144 ,  H01L27/146 ,  H01L27/14601 ,  H01L27/14607 ,  H01L27/1464 ,  H01L27/14643 ,  H01L27/14683 ,  H01L27/14687 ,  H01L27/14689

Abstract: A semiconductor device includes a substrate including a front side and a back side opposite the front side, first P-type regions located adjacent to the back side and spaced apart from each other in the substrate, N-type regions located under the first P-type regions and spaced apart from each other in the substrate, and second P-type regions located adjacent to the back side and located between the first P-type regions.

Abstract translation: 半导体器件包括：基板，其包括前侧和与前侧相反的背面;位于基板的背面相邻且间隔开的第一P型区域，位于第一P- 并且在基板中彼此间隔开，并且位于相邻于背侧且位于第一P型区域之间的第二P型区域。