公开(公告)号：US20240402248A1

公开(公告)日：2024-12-05

申请号：US18632845

申请日：2024-04-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dojong CHUN ,  Jungwook KIM ,  Minsu PARK ,  Ji-Suk KWON ,  Seokjae LEE

IPC: G01R31/317 ,  H01L21/66

Abstract: Disclosed is a memory device. The memory device includes a memory cell array; a first pad configured to receive a command from an external device; a second pad configured to exchange data with the external device; a third pad; test logic configured to generate a test pulse signal based on a test command received through the first pad; and a crack detection structure formed below the third pad and configured to include lines connected in series from the test logic to the second pad. A crack occurring in the third pad is detected based on a delay of a delay pulse signal changed when the test pulse signal passes through the crack detection structure.