DRAM ASSIST ERROR CORRECTION MECHANISM FOR DDR SDRAM INTERFACE

    公开(公告)号:US20210294697A1

    公开(公告)日:2021-09-23

    申请号:US17319844

    申请日:2021-05-13

    Abstract: A method of correcting a memory error of a dynamic random-access memory module (DRAM) using a double data rate (DDR) interface, the method includes conducting a memory transaction including multiple bursts with a memory controller to send data from data chips of the DRAM to the memory controller, detecting one or more errors using an ECC chip of the DRAM, determining a number of the bursts having the errors using the ECC chip of the DRAM, determining whether the number of the bursts having the errors is greater than a threshold number, determining a type of the errors, and directing the memory controller based on the determined type of the errors, wherein the DRAM includes a single ECC chip per memory channel.

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