公开(公告)号：US20240179925A1

公开(公告)日：2024-05-30

申请号：US18453611

申请日：2023-08-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jaekyu SUNG ,  Joonghyun BAEK ,  Cheolwoo LEE

IPC: H10B80/00 ,  H01L23/00 ,  H01L25/18

CPC classification number: H10B80/00 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/18 ,  H01L23/3128 ,  H01L2224/06135 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48145 ,  H01L2224/48227 ,  H01L2224/4903 ,  H01L2224/49175

Abstract: A semiconductor package may include a substrate; at least one controller chip on the substrate; at least one chip structure on the substrate, the at least one chip structure including a buffer chip, an upper chip stack on the buffer chip, and a lower chip stack below the buffer chip; an upper wire electrically connecting the upper chip stack, the buffer chip, and the at least one controller chip; a lower wire electrically connecting the lower chip stack and the at least one controller chip; a connection wire electrically connecting the at least one controller chip to the substrate; and connection bumps below the substrate, the connection bumps being electrically connected to the at least one controller chip and the at least one chip structure.