公开(公告)号：US20250016979A1

公开(公告)日：2025-01-09

申请号：US18616352

申请日：2024-03-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： JONGMIN KIM ,  CHANSIC YOON ,  KISEOK LEE

IPC: H10B12/00

Abstract: A semiconductor device may include first and second active patterns, first and second gate structures, a source/drain layer, a bit line structure, a contact plug structure, and a capacitor. The first and second active patterns are on a cell region and a peripheral circuit region of a substrate, respectively. The first gate structure extends through an upper portion of the first active pattern. The second gate structure is on an upper surface and an upper sidewall of the second active pattern. The source/drain layer is on a portion of the second active pattern that is adjacent to the second gate structure. The bit line structure is on a central portion of the first active pattern, and overlaps the second gate structure in a horizontal direction. The contact plug structure is on opposing end portions of the first active pattern. The capacitor is on the contact plug structure.