公开(公告)号：US20220270965A1

公开(公告)日：2022-08-25

申请号：US17744375

申请日：2022-05-13

Applicant: Samsung Electronics Co., Ltd.

Inventor： BYOUNGGON KANG ,  CHANGBEOM KIM ,  DALHEE LEE ,  EUN-HEE CHOI

IPC: H01L23/528 ,  H01L23/522 ,  H01L29/78 ,  H01L27/092 ,  H01L27/02 ,  H01L27/118

Abstract: A semiconductor device includes a first gate electrode disposed on a substrate and extending in a first horizontal direction, a first gate contact and a dummy gate contact, which are spaced apart from each other in the first horizontal direction and are in contact with a top surface of the first gate electrode, a first interconnect line extending in a second horizontal direction and overlapping the first gate contact in a vertical direction with respect to the upper surface of the substrate, and a voltage generator configured to generate a first voltage and apply the first voltage to the first gate electrode via the first interconnect line and the first gate contact. The first gate electrode receives the first voltage via the first interconnect line and the first gate contact from the voltage generator. The dummy gate contact receives the first voltage via the first gate electrode.

公开(公告)号：US20210075406A1

公开(公告)日：2021-03-11

申请号：US16726379

申请日：2019-12-24

Applicant: Samsung Electronics Co., Ltd.

Inventor： JINTAE KIM ,  BYOUNGGON KANG ,  CHANGBEOM KIM ,  HA-YOUNG KIM ,  YONGEUN CHO

IPC: H03K3/037 ,  H01L27/02 ,  H01L23/528 ,  H01L23/522 ,  H01L27/092 ,  H01L29/423 ,  H01L29/06

Abstract: A semiconductor device includes a flip flop cell. The flip flop cell is formed on a semiconductor substrate, includes a flip flop circuit, and comprises a scan mux circuit, a master latch circuit, a slave latch circuit, a clock driver circuit, and an output circuit. Each of the scan mux circuit, the master latch circuit, the slave latch circuit, the clock driver circuit, and the output circuit includes a plurality of active devices which together output a resulting signal for that circuit based on inputs, is a sub-circuit of the flip flop circuit, and occupies a continuously-bounded area of the flip flop circuit from a plan view. At least a first sub-circuit and a second sub-circuit of the sub-circuits overlap from the plan view in a first overlap region, the first overlap region including part of a first continuously-bounded area for the first sub-circuit and part of a second continuously-bounded area for the second sub-circuit.

公开(公告)号：US20210035902A1

公开(公告)日：2021-02-04

申请号：US16919670

申请日：2020-07-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： BYOUNGGON KANG ,  CHANGBEOM KIM ,  DALHEE LEE ,  EUN-HEE CHOI

IPC: H01L23/528 ,  H01L23/522 ,  H01L29/78 ,  H01L27/092 ,  H01L27/02 ,  H01L27/118

Abstract: A semiconductor device includes a first gate electrode disposed on a substrate and extending in a first horizontal direction, a first gate contact and a dummy gate contact, which are spaced apart from each other in the first horizontal direction and are in contact with a top surface of the first gate electrode, a first interconnect line extending in a second horizontal direction and overlapping the first gate contact in a vertical direction with respect to the upper surface of the substrate, and a voltage generator configured to generate a first voltage and apply the first voltage to the first gate electrode via the first interconnect line and the first gate contact. The first gate electrode receives the first voltage via the first interconnect line and the first gate contact from the voltage generator. The dummy gate contact receives the first voltage via the first gate electrode.