公开(公告)号：US20140167103A1

公开(公告)日：2014-06-19

申请号：US14049992

申请日：2013-10-09

Applicant: Samsung Electro-Mechanics Co., Ltd.

Inventor： Jaehoon Park ,  Inhyuk Song ,  Dongsoo Seo ,  Kwangsoo Kim ,  Keeju Um

IPC: H01L29/739 ,  H01L29/66

CPC classification number: H01L29/7397 ,  H01L29/0653 ,  H01L29/42368 ,  H01L29/6634 ,  H01L29/66348 ,  H01L29/7396

Abstract: Disclosed herein is a semiconductor device including a semiconductor substrate, a collector layer formed under the semiconductor substrate, a base layer formed on the semiconductor substrate, an emitter layer formed on the base layer, one or more trench barriers vertically penetrating the base layer and the emitter layer, a first gate insulating layer formed on the trench barriers and the emitter layer such that an upper portion of the emitter layer is partially exposed, a gate formed on the first gate insulating layer, a second gate insulating layer formed to cover the gate, and an emitter metal layer formed on an upper portion of the emitter layer exposed by the first gate insulating layer.

Abstract translation: 本发明公开了一种半导体器件，包括半导体衬底，形成在半导体衬底下面的集电极层，形成在半导体衬底上的基极层，形成于基底层上的发射极层，垂直穿透基底层的一个或多个沟槽屏障和 发射极层，形成在所述沟槽屏障和所述发射极层上的第一栅极绝缘层，使得所述发射极层的上部被部分暴露，形成在所述第一栅极绝缘层上的栅极，形成为覆盖所述栅极的第二栅极绝缘层 以及形成在由第一栅极绝缘层暴露的发射极层的上部的发射极金属层。