Abstract:
A thin film transistor array panel includes an array of pixels comprising a first pixel column, a second pixel column that is adjacent to the first pixel column, a first pixel row, and a second pixel row that is adjacent to the first pixel row. The pixels of the first and second pixel columns are connected to a first data line such that a data signal is applied to the pixels of the first and second pixel columns through the first data line, and that, in the first pixel row, the data signal is applied to the pixel of the first pixel column prior to the pixel of the second pixel column, whereas, in the second pixel row, the data signal is applied to the pixel of the second pixel column prior to the pixel of the first pixel column.
Abstract:
An exemplary embodiment of the present invention discloses a voltage generation circuit of a display apparatus, including at least one resistor, a memory configured to store a resistance value set signal, a controller changing a resistance value of the resistor referring to the resistance value set stored in the memory, and a voltage generator connected to one end of the resistor and is configured to receive an input current corresponding to the resistance value of the resistor and generate a gate-on voltage corresponding to the input current.
Abstract:
A display panel includes an amorphous silicon gate driver in which a lower voltage than the gate-off voltage output from the gate driver is applied to an adjacent stage as a low voltage transmission signal.