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公开(公告)号：US12159011B2
公开(公告)日：2024-12-03
申请号：US18104314
申请日：2023-02-01
Applicant: Samsung Display Co., Ltd.
Inventor： Yoon Ho Kim , June Hwan Kim , Jong Woo Park , Chaekyung Jung
Abstract: Provided is a display device comprising a display area including a plurality of pixels and a pad area disposed outside the display area, wherein the pad area includes a plurality of pads, and anchor structures positioned between two adjacent pads among the plurality of pads, the pad area includes a substrate, and at least one insulation layer that is positioned on the substrate and includes a first opening positioned between the two adjacent pads when viewed on the cross-section, and the anchor structure includes a first insulation layer that is positioned in the first opening, and does not overlap the pad.
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公开(公告)号：US12052893B2
公开(公告)日：2024-07-30
申请号：US18165502
申请日：2023-02-07
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Woo Ho Jeong , Se Myung Kwon , Yoon Ho Kim , Seok Je Seong , Joon Hoo Choi
IPC: H10K59/121 , H01L21/477 , H01L29/66 , H01L29/786
CPC classification number: H10K59/1213 , H01L21/477 , H01L29/66969 , H01L29/78675 , H01L29/7869
Abstract: An organic light-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer. The first semiconductor layer is disposed on a layer higher than the second semiconductor layer, the first semiconductor layer comprises an oxide semiconductor, the second semiconductor layer comprises low temperature polycrystalline silicon (LTPS), and the first insulating layer covers the entire first semiconductor layer.
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公开(公告)号：US20150144951A1
公开(公告)日：2015-05-28
申请号：US14257791
申请日：2014-04-21
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Doo-Na Kim , Hyeon Jun Lee , Chang Ok Kim , Yoon Ho Kim , Ki Seong Seo , Jung Yun Jo
IPC: H01L29/786 , H01L21/02 , H01L29/66 , H01L27/15 , H01L21/8234
CPC classification number: H01L21/02164 , H01L21/02131 , H01L21/02211 , H01L21/02271 , H01L29/4908 , H01L29/78669 , H01L29/78678 , H01L29/7869
Abstract: A thin film transistor array panel including: an insulation substrate, a gate line provided on the insulation substrate and including a gate electrode, a gate insulating layer provided on the gate line, a semiconductor layer provided on the gate insulating layer, and a source electrode and a drain electrode provided on the semiconductor layer and separated from each other, and the gate insulating layer includes a fluorinated silicon oxide (SiOF) layer, and the gate electrode, the semiconductor layer, the source electrode, and the drain electrode form a thin film transistor, and a threshold voltage shift value of the thin film transistor is substantially less than 4.9 V.
Abstract translation: 1.一种薄膜晶体管阵列面板，包括：绝缘基板，设置在所述绝缘基板上并包括栅电极的栅极线，设置在所述栅极线上的栅极绝缘层，设置在所述栅极绝缘层上的半导体层，以及源极 和设置在半导体层上并分离的漏电极，栅极绝缘层包括氟化氧化硅（SiOF）层，栅电极，半导体层，源电极和漏电极形成薄的 薄膜晶体管，并且薄膜晶体管的阈值电压偏移值基本上小于4.9V。
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公开(公告)号：US11922841B2
公开(公告)日：2024-03-05
申请号：US17950174
申请日：2022-09-22
Applicant: Samsung Display Co., Ltd.
Inventor： Yoon Ho Kim , Jong Woo Park , June Hwan Kim , Ki Ju Im , Young Tae Choi , Hyuncheol Hwang
CPC classification number: G09G3/006 , H01L27/124 , G09G2300/0426 , G09G2330/12
Abstract: The present disclosure relates to a display device, and the display device according to an embodiment includes: a substrate including a display area and a peripheral area; a plurality of light-emitting elements positioned in a display area; a plurality of pixel circuits connected to a plurality of light-emitting elements, respectively; a sensor positioned on the peripheral area of the substrate; a leakage current detecting circuit connected to the sensor; and a light emitting wiring connected to the leakage current detecting circuit and connected to at least one of the plurality of light-emitting elements, wherein the sensor includes a first sensor and the first sensor includes a first sensing transistor, and a first conductive pattern spaced apart from the channel of the first sensing transistor, and the first conductive pattern is positioned in the same layer as at least one of a plurality of layers configuring the transistor.
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Patent Agency Ranking
公开(公告)号：US10861920B2
公开(公告)日：2020-12-08
申请号：US16412059
申请日：2019-05-14
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Woo Ho Jeong , Seokje Seong , Semyung Kwon , Yoon Ho Kim , Byungju Lee
IPC: H01L27/32 , H01L51/00 , H01L29/66 , H01L27/12 , H01L29/786
Abstract: A TFT substrate includes a first active pattern, a first gate insulation, and a first gate. A second gate is on a second gate insulation covering the first gate. A source connection electrode contacts a source region of the first active pattern. A drain connection electrode contacts its drain region. A second active pattern is on a first insulation covering the second gate. A third gate insulation covers the second active pattern. A third gate is disposed on the third gate insulation. A second insulation interlayer covers the third gate. A first source, a first drain, a second source, and a second drain are disposed on the second insulation interlayer. The first source and the first drain contact the source connection electrode and the drain connection electrode. The second source and the second drain contact a source region and a drain region of the second active pattern.
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公开(公告)号：US11600678B2
公开(公告)日：2023-03-07
申请号：US17307606
申请日：2021-05-04
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Woo Ho Jeong , Se Myung Kwon , Yoon Ho Kim , Seok Je Seong , Joon Hoo Choi
IPC: H01L27/32 , H01L29/786 , H01L21/477 , H01L29/66
Abstract: An organic light-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer. The first semiconductor layer is disposed on a layer higher than the second semiconductor layer, the first semiconductor layer comprises an oxide semiconductor, the second semiconductor layer comprises low temperature polycrystalline silicon (LTPS), and the first insulating layer covers the entire first semiconductor layer.
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公开(公告)号：US09934746B2
公开(公告)日：2018-04-03
申请号：US15012612
申请日：2016-02-01
Applicant: Samsung Display Co. Ltd.
Inventor： Noboru Takeuchi , Min Soo Kang , Beom Jun Kim , Yoon Ho Kim , Seong Yeol Syn , Hong Woo Lee
CPC classification number: G09G3/3677 , G09G2300/0426 , G09G2310/0289 , G09G2310/08 , G11C19/28
Abstract: A gate driving circuit is provided. A gate driving circuit comprises a pull-up control unit including a control transistor, a pull-up unit, a carry unit which outputs a clock signal into a kth carry signal and a pull-down unit which pulls down a control node to an off voltage, wherein the control transistor includes one electrode and the other electrode connected to the control node, the one electrode and the other electrode being disposed on a gate electrode such that the one electrode and the other electrode being insulated from the gate electrode, wherein the gate electrode and the other electrode are disposed not to be overlapped with each other, and a distance between an upper surface of the gate electrode and a lower surface of the one electrode is longer than that of the upper surface of the gate electrode and a lower surface of the other electrode.
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公开(公告)号：US10998393B2
公开(公告)日：2021-05-04
申请号：US16822222
申请日：2020-03-18
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Woo Ho Jeong , Se Myung Kwon , Yoon Ho Kim , Seok Je Seong , Joon Hoo Choi
IPC: H01L27/32 , H01L29/786 , H01L21/477 , H01L29/66
Abstract: An organic fight-emitting display device comprises a first thin-film transistor disposed on a substrate; and a second thin-film transistor disposed on the substrate and spaced apart from the first thin-film transistor. The first thin-film transistor comprises a first semiconductor layer, a first conductive layer disposed on the first semiconductor layer and that overlaps the first semiconductor layer, and a first insulating layer disposed between the first semiconductor layer and the first conductive layer. The second thin-film transistor comprises a second semiconductor layer, and a second conductive layer disposed on the second semiconductor layer and that overlaps the second semiconductor layer. The first semiconductor layer is disposed on a layer higher than the second semiconductor layer, the first semiconductor layer comprises an oxide semiconductor, the second semiconductor layer comprises low temperature polycrystalline silicon (LTPS), and the first insulating layer covers the entire first semiconductor layer.
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公开(公告)号：US09524992B2
公开(公告)日：2016-12-20
申请号：US14875320
申请日：2015-10-05
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Hye Young Ryu , Hee Jun Byeon , Woo Geun Lee , Kap Soo Yoon , Yoon Ho Kim , Chun Won Byun
IPC: G02F1/1362 , H01L27/12 , G02F1/1343 , G02F1/1368
CPC classification number: H01L27/127 , G02F1/134363 , G02F1/136227 , G02F1/136286 , G02F1/1368 , G02F2001/136222 , G02F2001/136295 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L27/1262
Abstract: A thin film transistor array panel and a manufacturing method thereof according to an exemplary embodiment of the present invention form a contact hole in a second passivation layer formed of an organic insulator, protect a side of the contact hole by covering with a protection member formed of the same layer as the first field generating electrode and formed of a transparent conductive material, and etch the first passivation layer below the second passivation layer using the protection member as a mask. Therefore, it is possible to prevent the second passivation layer formed of an organic insulator from being overetched while etching the insulating layer below the second passivation layer so that the contact hole is prevented from being made excessively wide.
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