公开(公告)号：US20180122293A1

公开(公告)日：2018-05-03

申请号：US15802118

申请日：2017-11-02

Applicant: Samsung Display Co., Ltd.

Inventor： Woon Yong LIM ,  Sung Soo CHOI ,  Ki Hyun PYUN

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G3/20 ,  G09G2310/06 ,  G09G2310/08 ,  G09G2320/0209 ,  G09G2330/021 ,  G09G2330/028 ,  G09G2330/06 ,  G09G2360/16 ,  H03K7/08 ,  H03L7/08

Abstract: A converter includes a phase locked loop (“PLL”) unit which outputs a first frequency signal having a first frequency during a first period of one frame and to output a second frequency signal modulated to have a frequency corresponding to a pattern of an image signal during a second period other than the first period, a pulse width modulation (“PWM”) signal generator which generates a PWM signal according to the frequency of the frequency signal outputted from the PLL unit, and a voltage generator which outputs a driving voltage obtained by modulating an input voltage in response to the PWM signal to a voltage output terminal.

公开(公告)号：US20200090576A1

公开(公告)日：2020-03-19

申请号：US16691836

申请日：2019-11-22

Applicant: Samsung Display Co., Ltd.

Inventor： Woon Yong LIM ,  Sung Soo CHOI ,  Ki Hyun PYUN

IPC: G09G3/20

Abstract: A converter includes a phase locked loop (“PLL”) unit which outputs a first frequency signal having a first frequency during a first period of one frame and to output a second frequency signal modulated to have a frequency corresponding to a pattern of an image signal during a second period other than the first period, a pulse width modulation (“PWM”) signal generator which generates a PWM signal according to the frequency of the frequency signal outputted from the PLL unit, and a voltage generator which outputs a driving voltage obtained by modulating an input voltage in response to the PWM signal to a voltage output terminal.