Abstract:
Provided is a display apparatus including a substrate and a semiconductor layer including first and second semiconductor layers. A first gate insulating layer is formed on the semiconductor layer. A first gate wiring overlapping the first semiconductor layer is formed on the first gate insulating layer. A second gate insulating layer is formed on the first gate wiring. A second gate wiring overlapping the second semiconductor layer is formed on the second gate insulating layer. A third gate insulating layer covers the second gate wiring. A driving voltage line intersecting the first and second gate wirings is formed on the third gate insulating layer. A data line intersecting the first and second gate wirings is formed on the third gate insulating layer. A short circuit protection area is formed between the first gate wiring, the second gate wiring, the driving voltage line and the data line.
Abstract:
Provided is a display apparatus including a substrate and a semiconductor layer including first and second semiconductor layers. A first gate insulating layer is formed on the semiconductor layer. A first gate wiring overlapping the first semiconductor layer is formed on the first gate insulating layer. A second gate insulating layer is formed on the first gate wiring. A second gate wiring overlapping the second semiconductor layer is formed on the second gate insulating layer. A third gate insulating layer covers the second gate wiring. A driving voltage line intersecting the first and second gate wirings is formed on the third gate insulating layer. A data line intersecting the first and second gate wirings is formed on the third gate insulating layer. A short circuit protection area is formed between the first gate wiring, the second gate wiring, the driving voltage line and the data line.
Abstract:
Provided is a display apparatus including a substrate and a semiconductor layer including first and second semiconductor layers. A first gate insulating layer is formed on the semiconductor layer. A first gate wiring overlapping the first semiconductor layer is formed on the first gate insulating layer. A second gate insulating layer is formed on the first gate wiring. A second gate wiring overlapping the second semiconductor layer is formed on the second gate insulating layer. A third gate insulating layer covers the second gate wiring. A driving voltage line intersecting the first and second gate wirings is formed on the third gate insulating layer. A data line intersecting the first and second gate wirings is formed on the third gate insulating layer. A short circuit protection area is formed between the first gate wiring, the second gate wiring, the driving voltage line and the data line.
Abstract:
An organic light-emitting diode display is disclosed. In one aspect, the organic light-emitting diode display includes a plurality of pixels formed in a display area of a substrate, wherein each of the pixels includes a pixel electrode, an emission layer, and a common electrode. The display also includes an auxiliary common electrode formed in a lattice pattern between at least two of the pixels and electrically connected to the common electrode, wherein the auxiliary common electrode includes two opposing sides. The display further includes a power supply electrically connected to a non-display area of the substrate. The display also includes a pair of first power supply wires formed in the non-display area and configured to electrically connect the power supply to a center portion of the two sides of the auxiliary common electrode.
Abstract:
An organic light emitting diode display including: a substrate; a plurality of first signal lines on the substrate extending in a first direction; a first insulating layer covering the substrate and the first signal lines; a plurality of auxiliary signal lines formed on the first insulating layer and overlapping the first signal lines; a second insulating layer covering the auxiliary signal lines; a plurality of first signal line connecting members formed on the second insulating layer while overlapping parts of the auxiliary signal lines; a plurality of second signal lines crossing the first signal lines; a plurality of switching transistors and a plurality of driving transistors connected with the first signal lines and the second signal lines; and a plurality of organic light emitting diodes electrically connected to the driving transistors, where the first signal line connecting members connect the first signal lines to the auxiliary signal lines.
Abstract:
An organic light emitting diode display including: a substrate; a plurality of first signal lines on the substrate extending in a first direction; a first insulating layer covering the substrate and the first signal lines; a plurality of auxiliary signal lines formed on the first insulating layer and overlapping the first signal lines; a second insulating layer covering the auxiliary signal lines; a plurality of first signal line connecting members formed on the second insulating layer while overlapping parts of the auxiliary signal lines; a plurality of second signal lines crossing the first signal lines; a plurality of switching transistors and a plurality of driving transistors connected with the first signal lines and the second signal lines; and a plurality of organic light emitting diodes electrically connected to the driving transistors, where the first signal line connecting members connect the first signal lines to the auxiliary signal lines.
Abstract:
An organic light-emitting diode display is disclosed. In one aspect, the organic light-emitting diode display includes a plurality of pixels formed in a display area of a substrate, wherein each of the pixels includes a pixel electrode, an emission layer, and a common electrode. The display also includes an auxiliary common electrode formed in a lattice pattern between at least two of the pixels and electrically connected to the common electrode, wherein the auxiliary common electrode includes two opposing sides. The display further includes a power supply electrically connected to a non-display area of the substrate. The display also includes a pair of first power supply wires formed in the non-display area and configured to electrically connect the power supply to a center portion of the two sides of the auxiliary common electrode.
Abstract:
Provided is a display apparatus including a substrate and a semiconductor layer including first and second semiconductor layers. A first gate insulating layer is formed on the semiconductor layer. A first gate wiring overlapping the first semiconductor layer is formed on the first gate insulating layer. A second gate insulating layer is formed on the first gate wiring. A second gate wiring overlapping the second semiconductor layer is formed on the second gate insulating layer. A third gate insulating layer covers the second gate wiring. A driving voltage line intersecting the first and second gate wirings is formed on the third gate insulating layer. A data line intersecting the first and second gate wirings is formed on the third gate insulating layer. A short circuit protection area is formed between the first gate wiring, the second gate wiring, the driving voltage line and the data line.
Abstract:
An organic light emitting diode display includes a substrate; a gate wire on the substrate; an interlayer insulating layer covering the gate wire; a data wire on the interlayer insulating layer; a passivation layer on the data wire and the interlayer insulating layer and having a protection opening; a pixel electrode on a first wiring portion of the data wire exposed through the protection opening and the interlayer insulating layer; a pixel definition layer on the passivation layer and having a pixel opening exposing the pixel electrode; an organic emission layer covering the pixel electrode; and a common electrode covering the organic emission layer and the pixel definition layer, wherein the pixel electrode contacting the first wiring portion of the data wire and the interlayer insulating layer has protrusions and depressions.
Abstract:
An organic light emitting diode display includes a substrate, switching elements on the substrate, at least one barrier member on the substrate, a passivation layer covering the switching elements and including a protection opening exposing the barrier member, pixel electrodes on the passivation layer and connected to the switching elements, auxiliary electrodes separated from and formed from a same layer as the pixel electrodes, an organic emission layer including a pixel emission layer and a common emission layer sequentially formed on the pixel electrodes, and a common electrode including an auxiliary common electrode and a main common electrode sequentially formed on the common emission layer. The common emission layer and the auxiliary common electrode have a common contact hole at a position corresponding to a position of the barrier member. The main common electrode is connected with the auxiliary electrode through the common contact hole.