Display device and method of driving display device

    公开(公告)号:US12183258B2

    公开(公告)日:2024-12-31

    申请号:US17869200

    申请日:2022-07-20

    Abstract: Disclosed is a display device, which includes a display panel, a controller that receives an image signal and an external synchronization signal and generates a control signal, and a driver that generates a driving signal in response the control signal and provides the driving signal to the display panel. The controller includes a synchronization signal generator that generates an internal synchronization signal based on a reference clock signal, a corrector that corrects the internal synchronization signal to generate a corrected synchronization signal, and a control signal generator that generates the control signal, and the control signal generator generates the control signal based on the external synchronization signal when the external synchronization signal is in a normal state, and generates the control signal based on the internal synchronization signal when the external synchronization signal is in an abnormal state.

    Display apparatus and method of driving display panel using the same

    公开(公告)号:US12175913B2

    公开(公告)日:2024-12-24

    申请号:US17558998

    申请日:2021-12-22

    Abstract: A display apparatus includes a display panel, a data analyzer, a logic core and a latch. The display panel is configured to display an image. The data analyzer is configured to analyze input image data. The logic core is configured to compensate all of line data, compensate a part of the line data, or not compensate all of the line data according to an analysis result of the data analyzer. The latch is configured to receive compensated data from the logic core.

    Data driving circuit and a display device including the same

    公开(公告)号:US12223916B2

    公开(公告)日:2025-02-11

    申请号:US18096057

    申请日:2023-01-12

    Inventor: Subin Kim

    Abstract: A data driving circuit including: a latch which receives an output image signal and outputs a latch data signal including a plurality of bits; a transition detector which compares the latch data signal of a current line with the latch data signal of a previous line, and outputs a first transition detection signal based on the comparison; a delay compensator which outputs a delay data signal obtained by delaying some of the plurality of bits of the latch data signal based on the first transition detection signal; a level shifter which outputs a level shift data signal obtained by changing a voltage level of the delay data signal; and an output circuit which converts the level shift data signal into a data signal and provides the data signal obtained by converting the level shift data signal to a data line.

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