公开(公告)号：US20250017061A1

公开(公告)日：2025-01-09

申请号：US18423292

申请日：2024-01-26

Applicant: Samsung Display Co., Ltd.

Inventor： HYUNGKEUN PARK ,  SEOKHYUN LIM ,  Gun Hee KIM ,  Joo Hee JEON ,  Sun Young JUNG ,  MIYEON CHO

IPC: H10K59/131 ,  G09G3/32 ,  H10K59/80

Abstract: According to embodiments, a light emitting display device includes a substrate, a first anode and a second anode positioned on the substrate, a plurality of conductive layers, at least one semiconductor layer, and a plurality of insulating layers positioned between the substrate and the first anode and between the substrate and the second anode, wherein the plurality of conductive layers includes a capacitor triple layer, a first overlapping wiring, and a second overlapping wiring, the first overlapping wiring and the second overlapping wiring overlap at least partially on a plane, at least a portion of the first anode overlaps the capacitor triple layer on a plane, and a first portion of the second anode overlaps the first overlapping wiring and the second overlapping wiring.

公开(公告)号：US20230397467A1

公开(公告)日：2023-12-07

申请号：US18453450

申请日：2023-08-22

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： SEOKHYUN LIM ,  JOOHEE JEON ,  SUNMI KANG ,  JUHOON KANG ,  HYUNGKEUN PARK ,  DONGHWAN SHIM ,  MIYEON CHO ,  GUNHEE KIM ,  SUNYOUNG JUNG

IPC: H10K59/131 ,  G09G3/3233

CPC classification number: H10K59/1315 ,  G09G3/3233 ,  G09G2300/0426 ,  G09G2300/0819 ,  G09G2300/0852

Abstract: A display apparatus includes a first transistor including a first semiconductor layer and a first electrode that at least partially overlaps the first semiconductor layer. A first capacitor includes the first electrode and a second electrode that at least partially overlaps the first electrode. A second capacitor includes the second electrode and a third electrode that at least partially overlaps the second electrode. A first data line is configured to transfer a data voltage therethrough. First and second scan lines are configured to transfer first and second scan signals therethrough, respectively. A second transistor connects the first data line to the second electrode in response to the first scan signal. A third transistor connects the first electrode to a drain of the first transistor in response to the second scan signal.

公开(公告)号：US20230172016A1

公开(公告)日：2023-06-01

申请号：US17963382

申请日：2022-10-11

Applicant: Samsung Display Co., Ltd.

Inventor： HYUNGKEUN PARK ,  SUNMI KANG ,  JUHOON KANG ,  DONGHWAN SHIM ,  SEOKHYUN LIM ,  JOOHEE JEON ,  MIYEON CHO ,  GUN HEE KIM ,  SUNYOUNG JUNG

IPC: H01L27/32 ,  H01L27/12

CPC classification number: H01L27/3276 ,  H01L27/3262 ,  H01L27/124 ,  H01L27/1225

Abstract: A display device including a display panel including a display area, a non-display area, a pixel disposed in the display area and including a light emitting element and a pixel driving circuit electrically connected to the light emitting element, a data line electrically connected to the pixel and extending in a first direction, a plurality of scan lines electrically connected to the pixel and extending in a second direction intersecting the first direction, an emission control line electrically connected to the pixel and extending in the second direction, and a first initialization voltage line electrically connected to the pixel, extending in the second direction, and to which a first initialization voltage is applied. The first initialization voltage line is disposed between one of the plurality of scan lines and the emission control line and another of the plurality of scan lines and the emission control line.

公开(公告)号：US20230165056A1

公开(公告)日：2023-05-25

申请号：US17944675

申请日：2022-09-14

Applicant: Samsung Display Co., Ltd.

Inventor： SUNMI KANG ,  JOOHEE JEON ,  JUHOON KANG ,  GUN HEE KIM ,  HYUNGKEUN PARK ,  SEOKHYUN LIM ,  SUNYOUNG JUNG ,  MIYEON CHO

IPC: H01L27/32 ,  H01L29/786

CPC classification number: H01L27/3262 ,  H01L27/3276 ,  H01L29/7869 ,  H01L29/78651

Abstract: A display panel includes a first transistor including a first semiconductor pattern including one of a silicon semiconductor and an oxide semiconductor and a first gate electrode overlapping the first semiconductor pattern in a plan view, a second transistor including a second semiconductor pattern different from the first semiconductor pattern and a second gate electrode overlapping the second semiconductor pattern in the plan view, a first upper electrode overlapping the first gate electrode in the plan view, a first connection electrode electrically connected to the first semiconductor pattern via a first contact hole through at least one insulating layer, and a light emitting element disposed on the first connection electrode. A single insulating layer is disposed between the light emitting element and the first connection electrode, and the first connection electrode is electrically connected to the light emitting element via a second contact hole through the single insulating layer.