公开(公告)号：US20200035182A1

公开(公告)日：2020-01-30

申请号：US16393018

申请日：2019-04-24

Applicant: Samsung Display Co., Ltd.

Inventor： Hyeonseok BAE ,  Haengwon PARK ,  Jungdeok SEO

IPC: G09G3/36 ,  G11C19/28

Abstract: A gate driving circuit includes a charge part which charges a charge node with a clock signal having a first high voltage for a first period, an output part which charges an output node with the first high voltage in response to a first voltage of the charge node for the first period, and outputs a second voltage of the output node as a gate signal, a first discharge part which discharges the second voltage to a first off voltage in response to a clock bar signal having a second high voltage for a second period following the first period, and a second discharge part which discharges the first voltage to the second off voltage for the second period. The second off voltage is set to one of a first level lower than a level of the first off voltage and a second level lower than the first level.