公开(公告)号：US20240420640A1

公开(公告)日：2024-12-19

申请号：US18409565

申请日：2024-01-10

Applicant: Samsung Display Co., LTD.

Inventor： DO YEON HWANG ,  KWANG-MIN KIM ,  Inhyeok Yeo

IPC: G09G3/3258 ,  G09G3/32 ,  G09G3/3233

Abstract: A display device includes: a display panel including a first area and a second area; and a panel driver configured to drive the display panel, to provide a first mode control signal to pixels in the first area, and to provide a second mode control signal to pixels in the second area, wherein the first area is configured to be driven in a first mode to display an image having a first viewing angle or a second mode to display an image having a second viewing angle narrower than the first viewing angle based on the first mode control signal, and wherein the second area is configured to be driven in the first mode or the second mode based on the second mode control signal.

公开(公告)号：US20240324294A1

公开(公告)日：2024-09-26

申请号：US18520556

申请日：2023-11-28

Applicant: Samsung Display Co., Ltd.

Inventor： Inhyeok Yeo ,  Kwangmin Kim ,  Kiwook Kim ,  Daehyun Kim ,  Heyjin Shin ,  Changkyu Jin ,  Doyeon Hwang

IPC: H10K59/121 ,  G09G3/3233 ,  H10K59/131

CPC classification number: H10K59/1216 ,  G09G3/3233 ,  H10K59/1213 ,  H10K59/131 ,  G09G2320/0247

Abstract: A display apparatus includes a substrate including a display area and a peripheral area, a first semiconductor layer including a driving semiconductor pattern, a first conductive layer disposed on the first semiconductor layer, and including a first capacitor electrode and a second capacitor electrode, a second conductive layer disposed on the first conductive layer, and including a third capacitor electrode overlapping the first capacitor electrode and the second capacitor electrode, a second semiconductor layer disposed on the second conductive layer, and including a first semiconductor pattern overlapping the third capacitor electrode, a third conductive layer disposed on the second semiconductor layer, and including a first electrode pattern overlapping the first semiconductor pattern and the third capacitor electrode, and a fourth conductive layer disposed on the third conductive layer, and including a connection electrode electrically connected to the first semiconductor pattern and the third capacitor electrode.