公开(公告)号：US11587487B2

公开(公告)日：2023-02-21

申请号：US17412609

申请日：2021-08-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyun Chang Kim ,  Se Byung Chae

IPC: G09G3/20

Abstract: A display driving circuit includes a clock signal generator which generates a clock signal at a frequency in response to a frequency control signal, a frequency variation determiner which adaptively changes a frequency variation of the clock signal, based on a magnitude of a deviation between the frequency of the clock signal and a target frequency calculated based on a reference clock signal supplied from the outside, and a frequency controller which generates the frequency control signal which updates the frequency of the clock signal, based on the frequency variation, and provides the frequency control signal to the clock signal generator.

公开(公告)号：US11270653B2

公开(公告)日：2022-03-08

申请号：US17161489

申请日：2021-01-28

Applicant: Samsung Display Co., Ltd.

Inventor： Hyun Chang Kim ,  Sung Chun Park ,  Dong Kwan Han

IPC: G06F1/00 ,  G09G3/3275

Abstract: A display device includes the following elements: a display panel comprising pixels; a data driver supplying data signals to the plurality of pixels; a driving voltage supply supplying a first driving voltage to the data driver; a power supply supplying a first input driving voltage to the driving voltage supply; and a timing controller providing control signals to the data driver, the driving voltage supply, and the power supply and providing luminance information and per-second frame rate information of the display panel to the driving voltage supply. The driving voltage supply comprises an input driving voltage adjuster which adjusts the first input driving voltage to a second input driving voltage based on the luminance information and the per-second frame rate information.

公开(公告)号：US11854453B2

公开(公告)日：2023-12-26

申请号：US18160265

申请日：2023-01-26

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Hyun Chang Kim ,  Se Byung Chae

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2310/0267 ,  G09G2310/0275 ,  G09G2310/08

Abstract: A display driving circuit includes a clock signal generator which generates a clock signal at a frequency in response to a frequency control signal, a frequency variation determiner which adaptively changes a frequency variation of the clock signal, based on a magnitude of a deviation between the frequency of the clock signal and a target frequency calculated based on a reference clock signal supplied from the outside, and a frequency controller which generates the frequency control signal which updates the frequency of the clock signal, based on the frequency variation, and provides the frequency control signal to the clock signal generator.