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公开(公告)号：US12075662B2
公开(公告)日：2024-08-27
申请号：US18301976
申请日：2023-04-17
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Injun Bae , Donghwi Kim , Chulho Kim , Woori Seo , Jin Jeon
IPC: H10K59/124 , H10K59/121 , H10K59/123 , H10K59/131 , H10K71/00 , H10K102/00
CPC classification number: H10K59/124 , H10K59/1213 , H10K59/1216 , H10K59/123 , H10K59/131 , H10K71/00 , H10K2102/351
Abstract: A display panel includes a substrate, a transistor on the substrate, a storage capacitor on the substrate and electrically connected to the transistor, a metal layer between the substrate and the transistor, a first insulating layer on the metal layer and having a first contact hole, and a wiring connected to the metal layer through the first contact hole, wherein the first insulating layer having a first hole apart from the transistor.
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2.发明授权公开(公告)号：US11877494B2
公开(公告)日：2024-01-16
申请号：US18150402
申请日：2023-01-05
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Injun Bae , Donghwi Kim , Chulho Kim , Jin Jeon
IPC: H10K59/60 , H10K50/84 , H10K59/123 , H10K102/00
CPC classification number: H10K59/60 , H10K50/84 , H10K59/123 , H10K2102/00
Abstract: A display apparatus includes a substrate including a display area and a sensor area, the sensor area including an auxiliary display area and a transmitting area, first display elements arranged over the display area, second display elements arranged over the auxiliary display area, transmitting units arranged in the transmitting area and configured to transmit at least a portion of light incident on the transmitting units, and an optical layer including a mesh pattern covering at least the second display elements.
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公开(公告)号：US11387312B2
公开(公告)日：2022-07-12
申请号：US17003522
申请日：2020-08-26
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Yoonjong Cho , Donghwi Kim , Jin Jeon
IPC: H01L27/32 , H01L29/786
Abstract: A display device includes a first thin-film transistor (TFT) including a first semiconductor layer including silicon semiconductor and a first gate electrode insulated from the first semiconductor layer, a first interlayer insulating layer covering the first gate electrode, a second TFT arranged on the first interlayer insulating layer and including a second semiconductor layer including oxide semiconductor and a second gate electrode insulated from the second semiconductor layer, a second interlayer insulating layer covering the second gate electrode, a first power supply voltage line arranged on the second interlayer insulating layer, a first planarization layer covering the first power supply voltage line, and a data line arranged on the first planarization layer and at least partially overlapping the first power supply voltage line.
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公开(公告)号：US10854690B2
公开(公告)日：2020-12-01
申请号：US16686800
申请日：2019-11-18
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Injun Bae , Donghwi Kim , Chulho Kim , Jin Jeon
Abstract: A display apparatus includes a substrate including a display area and a sensor area, the sensor area including an auxiliary display area and a transmitting area, first display elements arranged over the display area, second display elements arranged over the auxiliary display area, transmitting units arranged in the transmitting area and configured to transmit at least a portion of light incident on the transmitting units, and an optical layer including a mesh pattern covering at least the second display elements.
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公开(公告)号：US11957028B2
公开(公告)日：2024-04-09
申请号：US17675000
申请日：2022-02-18
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Injun Bae , Hyunwook Choi , Donghwi Kim , Chulho Kim , Woori Seo , Jin Jeon
IPC: H10K59/65 , H10K59/123 , H10K59/131
CPC classification number: H10K59/65 , H10K59/123 , H10K59/131
Abstract: A display panel is provided including a substrate including a display area comprising first pixels and a sensor area including second pixels and a transmission portion. A display element layer is disposed on the substrate, the display element layer comprising the first pixels electrically connected to a first thin film transistor and the second pixels electrically connected to a second thin film transistor. A conductive layer is disposed between the second thin film transistor and the substrate, the conductive layer having two or more steps at an edge thereof.
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Patent Agency Ranking
公开(公告)号：US20210057496A1
公开(公告)日：2021-02-25
申请号：US17094063
申请日：2020-11-10
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： INJUN BAE , Donghwi Kim , Chulho Kim , Jin Jeon
Abstract: A display apparatus includes a substrate including a display area and a sensor area, the sensor area including an auxiliary display area and a transmitting area, first display elements arranged over the display area, second display elements arranged over the auxiliary display area, transmitting units arranged in the transmitting area and configured to transmit at least a portion of light incident on the transmitting units, and an optical layer including a mesh pattern covering at least the second display elements.
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公开(公告)号：US20200312927A1
公开(公告)日：2020-10-01
申请号：US16752093
申请日：2020-01-24
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Injun Bae , Hyunwook Choi , Donghwi Kim , Chulho Kim , Woori Seo , Jin Jeon
IPC: H01L27/32
Abstract: A display panel is provided including a substrate including a display area comprising first pixels and a sensor area including second pixels and a transmission portion. A display element layer is disposed on the substrate, the display element layer comprising the first pixels electrically connected to a first thin film transistor and the second pixels electrically connected to a second thin film transistor. A conductive layer is disposed between the second thin film transistor and the substrate, the conductive layer having two or more steps at an edge thereof.
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公开(公告)号：US11950485B2
公开(公告)日：2024-04-02
申请号：US17722020
申请日：2022-04-15
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Injun Bae , Donghwi Kim , Chulho Kim , Woori Seo , Jin Jeon , Jinkoo Chung
IPC: H10K59/65 , G09G3/3266 , H10K59/121 , H10K59/131
CPC classification number: H10K59/65 , G09G3/3266 , H10K59/1213 , H10K59/131
Abstract: Provided is a display apparatus including a substrate having a display area including a main pixel, and a sensor area including a sub-pixel and a transmission portion, a plurality of first lines arranged in the sensor area, extending in a first direction, and bypassing the transmission portion, and a first electrode layer under the plurality of first lines, between the sub-pixel and the transmission portion, and at least partially overlapping a spacing region between the plurality of first lines.
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公开(公告)号：US11574966B2
公开(公告)日：2023-02-07
申请号：US17094063
申请日：2020-11-10
Applicant: SAMSUNG DISPLAY CO., LTD.
Inventor： Injun Bae , Donghwi Kim , Chulho Kim , Jin Jeon
Abstract: A display apparatus includes a substrate including a display area and a sensor area, the sensor area including an auxiliary display area and a transmitting area, first display elements arranged over the display area, second display elements arranged over the auxiliary display area, transmitting units arranged in the transmitting area and configured to transmit at least a portion of light incident on the transmitting units, and an optical layer including a mesh pattern covering at least the second display elements.
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公开(公告)号：US20210249498A1
公开(公告)日：2021-08-12
申请号：US17003522
申请日：2020-08-26
Applicant: Samsung Display Co., Ltd.
Inventor： Yoonjong CHO , Donghwi Kim , Jin Jeon
IPC: H01L27/32 , H01L29/786
Abstract: A display device includes a first thin-film transistor (TFT) including a first semiconductor layer including silicon semiconductor and a first gate electrode insulated from the first semiconductor layer, a first interlayer insulating layer covering the first gate electrode, a second TFT arranged on the first interlayer insulating layer and including a second semiconductor layer including oxide semiconductor and a second gate electrode insulated from the second semiconductor layer, a second interlayer insulating layer covering the second gate electrode, a first power supply voltage line arranged on the second interlayer insulating layer, a first planarization layer covering the first power supply voltage line, and a data line arranged on the first planarization layer and at least partially overlapping the first power supply voltage line.
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