Abstract:
Disclosed are a display apparatus and a method of driving the same. An image signal receiver sequentially outputs frames for image display. A local illumination calculation unit displays an image on a display unit based on the frames and calculates light emission amount of a light source provided for each section of a backlight unit. A frame interpolator generates sub-frames based on the frames and outputs the sub-frames and the frames. A pixel adjuster adjusts light transmittance of each pixel according to the brightness of each pixel and the amount of the light emitted from each section which is calculated by the local illumination calculation unit when the image is displayed based on the frames and the sub-frames sequentially output from a frame interpolator. Local illumination is realized without increasing the number of memory devices while a frame frequency is increased.
Abstract:
An image processing part includes an edge enhancing part, an artifact detecting part and a compensating part. The edge enhancing part emphasizes an edge portion of an object in input image data. The artifact detecting part detects a corner outlier artifact at an area adjacent to the edge portion of the object. The compensating part compensates the corner outlier artifact. Accordingly, the edge portion of the object may be enhanced and the corner outlier artifact is decreased so that the display quality may be improved.
Abstract:
An image processing part includes an edge enhancing part, an artifact detecting part and a compensating part. The edge enhancing part emphasizes an edge portion of an object in input image data. The artifact detecting part detects a corner outlier artifact at an area adjacent to the edge portion of the object. The compensating part compensates the corner outlier artifact. Accordingly, the edge portion of the object may be enhanced and the corner outlier artifact is decreased so that the display quality may be improved.
Abstract:
A Rate driving circuit including: a plurality of stages outputting signals to gate lines, the stages includes a first transistor of which one end and a control terminal are connected, one end and the control terminal are connected with a first input terminal, and the other end is connected to a second node, a second transistor including a control terminal connected to a first node, connected with a clock input terminal, and the other end connected to a first output terminal, a first capacitor of which one end is connected to the first node, the other end is connected to the other end of the second transistor and the first output terminal, and a third transistor of which one end is connected to the other end of the first transistor, the other end is connected with the first node, and a control terminal is connected to a third node.
Abstract:
A display panel includes setting gate lines to which a setting gate signal is applied, charging gate lines to which a charging gate signal is applied; data lines to which a data voltage is applied, and pixels connected to the setting gate lines, the charging gate lines and the data lines, where each of the pixels includes a first switching element connected to a corresponding setting gate line and a corresponding data line, a control capacitor configured to charge an output voltage of the first switching element, an amplifying part configured to amplify the output voltage of the first switching element charged at the control capacitor, a power supplying part connected to a corresponding charging gate line and configured to supply power to the amplifying part, and a liquid crystal capacitor configured to charge an output voltage of the amplifying part.