公开(公告)号：US12178077B2

公开(公告)日：2024-12-24

申请号：US17672381

申请日：2022-02-15

Applicant: Samsung Display Co., Ltd.

Inventor： Jun-Yong An ,  Wonkyu Kwak ,  Min Jeong Kim ,  Hyungjun Park ,  Nuree Um

IPC: H10K59/121 ,  H10K59/131

Abstract: A display device may include a plurality of pixel circuits disposed adjacent to each other, the plurality of pixel circuits including a plurality of active patterns disposed to correspond to the pixel circuits, respectively. Each of the active patterns includes a first initialization channel region to which an initialization voltage is applied, a second initialization channel region to which the initialization voltage is applied, and a third initialization channel region to which the initialization voltage is applied, the second initialization channel region of each of the active patterns is connected to the first initialization channel region of the adjacent active patterns, and a first end region of the third initialization channel region is connected between the first initialization channel region and the second initialization channel region.

公开(公告)号：US12144213B2

公开(公告)日：2024-11-12

申请号：US17315612

申请日：2021-05-10

Applicant: Samsung Display Co., Ltd.

Inventor： Hyungjun Park ,  Min Jeong Kim ,  Jun-Yong An ,  Nuree Um

IPC: G09G3/3258 ,  H10K59/121 ,  H10K59/131

Abstract: A display device includes a substrate including a display area and a hole edge area defining a hole therein and surrounding the hole, where the display area surrounds the hole edge area, a plurality of pixels disposed in the display area in a first direction and a second direction intersecting the first direction, an emission control line extending in the first direction in the display area, and bypassing the hole along the hole edge area, a scan line extending in the first direction in the display area, located in the second direction from the emission control line, and bypassing the hole along the hole edge area, an active pattern disposed in the hole edge area, and overlapping the emission control line and the scan line in a plan view, and a connection line connected to the active pattern to provide a driving voltage to the active pattern.

公开(公告)号：US12165553B2

公开(公告)日：2024-12-10

申请号：US18095097

申请日：2023-01-10

Applicant: Samsung Display Co., LTD.

Inventor： Hai-Jung In ,  Chulkyu Kang ,  Kimyeong Eom ,  Soon-Gi Kwon ,  Min Jeong Kim

IPC: G09G3/20

Abstract: A gate driver includes: a pull-up circuit configured to pull up a gate output signal to a high voltage in response to a signal at a first node of the pull-up circuit; a first pull-down circuit configured to pull down the gate output signal to a low voltage in response to a signal at a second node of the first pull-down circuit; a second pull-down circuit configured to pull down the gate output signal to the low voltage in response to a signal at a third node of the second pull-down circuit; a first selection circuit configured to activate the first pull-down circuit and deactivate the second pull-down circuit based on a first selection signal; and a second selection circuit configured to activate the second pull-down circuit and deactivate the first pull-down circuit based on a second selection signal.

公开(公告)号：US12127458B2

公开(公告)日：2024-10-22

申请号：US17682392

申请日：2022-02-28

Applicant: Samsung Display Co., Ltd.

Inventor： Jun-Yong An ,  Min Jeong Kim ,  Hyungjun Park ,  Nuree Um ,  Kwang-Chul Jung

IPC: G09G3/3233 ,  H10K59/131

CPC classification number: H10K59/1315 ,  G09G3/3233 ,  G09G2300/0819

Abstract: A display device includes a substrate including sub-pixel circuit areas that are arranged in m rows and n columns, where m and n are positive integers, first gate lines extending in a row direction, data lines extending in a column direction, initialization power lines extending in the row direction, including first power lines disposed in sub-pixel circuit areas of odd rows and receiving a first initialization voltage and second power lines disposed in sub-pixel circuit areas of even rows and receiving a second initialization voltage, and transmission lines extending in the column direction, including first transmission lines disposed in sub-pixel circuit areas of odd columns and receiving the first initialization voltage from the first power lines and second transmission lines disposed in sub-pixel circuit areas of even columns and receiving the second initialization voltage from the second power lines.