公开(公告)号：US20250061841A1

公开(公告)日：2025-02-20

申请号：US18655482

申请日：2024-05-06

Applicant: Samsung Display Co., LTD.

Inventor： KYUNGHO KIM ,  NAHYEON CHA ,  SUNGYOON HWANG

IPC: G09G3/32

Abstract: A gate driver includes a control circuit which controls a voltage of a first control node and a voltage of a second control node in response to an input signal, a first control clock signal, a the second control clock signal, a carry output circuit which generates a carry signal in response to voltages of the first control node and the second control node, an enable node control circuit controlling a voltage of an enable node in response to the carry signal, an enable signal, and an inverted enable signal, a masking circuit which controls a voltage of a first intermediate node in response to the voltage of the first control node, the carry signal, and the voltage of the enable node, and a gate output circuit which outputs a gate signal in response to the carry signal, the voltage of the first intermediate node, and an output clock signal.

公开(公告)号：US20240386825A1

公开(公告)日：2024-11-21

申请号：US18591991

申请日：2024-02-29

Applicant: Samsung Display Co., LTD.

Inventor： KYUNGHO KIM ,  GICHANG LEE

IPC: G09G3/20

Abstract: A gate driver including a plurality of stages. Each of the plurality of stages includes a first masking controlling circuit including a control circuit, a carry output circuit, a first enable node controlling circuit, a first masking circuit, a first gate output circuit, and a second masking controlling circuit including a second enable node controlling circuit, a second masking circuit and a second gate output circuit. The first masking controlling circuit and the second masking controlling circuit shares the control circuit and the carry output circuit.

公开(公告)号：US20240265847A1

公开(公告)日：2024-08-08

申请号：US18369350

申请日：2023-09-18

Applicant: Samsung Display Co., LTD.

Inventor： KYUNGHO KIM ,  GICHANG LEE

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0819 ,  G09G2300/0852 ,  G09G2310/0267 ,  G09G2330/021

Abstract: A scan driver includes: stages. Each stage includes: a first node control circuit for controlling a voltage of a first node; an inverted carry node control circuit for controlling a voltage of an inverted carry node; a carry output circuit for outputting a carry signal; a fourth node control circuit for controlling a voltage of a fourth node in response to the carry signal; a second node control circuit for controlling a voltage of a second node in response to the carry signal, an enable signal, and the voltage of the inverted carry node; a third node control circuit for controlling a voltage of a third node in response to the voltage of the second node and the voltage of the fourth node; and a scan output circuit for outputting a scan signal in response to the voltage of the third node and the voltage of the fourth node.

公开(公告)号：US20180081226A1

公开(公告)日：2018-03-22

申请号：US15823301

申请日：2017-11-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： DONGHEE SHIN ,  KYUNGHO KIM

IPC: G02F1/1345 ,  G09G3/20 ,  H01L27/12 ,  G02F1/1368 ,  G02F1/1362 ,  H01L25/065

CPC classification number: G02F1/13452 ,  G02F1/13458 ,  G02F1/136286 ,  G02F1/1368 ,  G09G3/20 ,  G09G2300/0426 ,  G09G2320/0223 ,  H01L25/0652 ,  H01L27/124

Abstract: A display device includes a substrate including a plurality of pixels disposed in a display area of the substrate. A non-display area of the substrate is disposed adjacent to the display area. The display device further includes a plurality of gate lines and a plurality of data lines arranged in a matrix form in the display area on the substrate, at least one driver integrated circuit (IC) disposed in the non-display area on the substrate, and a plurality of data fan-out wirings disposed on the substrate and connecting the data lines and the at least one driver IC. Lengths of the data fan-out wirings vary, and the data lines overlap the gate lines more as the lengths of the corresponding data fan-out wirings decrease.

公开(公告)号：US20250006108A1

公开(公告)日：2025-01-02

申请号：US18609564

申请日：2024-03-19

Applicant: Samsung Display Co., LTD.

Inventor： SANG YONG NO ,  KYUNGHO KIM

IPC: G09G3/32

Abstract: A gate signal masking circuit includes: a connection transistor connecting a first control node and a first transistor based on a connection signal; the first transistor connected to a masking node, the connection transistor and a second control node; a second transistor including a control electrode receiving a carry signal, a first electrode receiving a masking signal and a second electrode connected to a first node; a third transistor including a control electrode receiving an enable signal, a first electrode connected to the first node and a second electrode connected to the masking node; a fourth transistor including a control electrode receiving a second enable signal, a first electrode connected to the masking node and a second electrode connected to a second node; a fifth transistor including a control electrode receiving the carry signal, a first electrode connected to the second node and a second electrode receiving a power voltage.

公开(公告)号：US20240153424A1

公开(公告)日：2024-05-09

申请号：US18215736

申请日：2023-06-28

Applicant: Samsung Display Co., LTD.

Inventor： KYUNGHO KIM ,  GICHANG LEE

IPC: G09G3/20

CPC classification number: G09G3/20 ,  G09G2300/0819 ,  G09G2300/0842 ,  G09G2310/0267 ,  G09G2330/021 ,  G09G2340/0435

Abstract: A scan driver includes a plurality of stages. Each of the plurality of stages includes a control circuit which controls a voltage of a first node and a voltage of a second node in response to an input signal, a first clock signal and a second clock signal, a carry output circuit which outputs a carry signal in response to the voltage of the first node and the voltage of the second node, an enable node controlling circuit which controls a voltage of an enable node in response to the carry signal, an enable signal and an inverted enable signal, a masking circuit which controls a voltage of a third node in response to the voltage of the second node and the voltage of the enable node, and a scan output circuit which outputs a scan signal in response to the voltage of the first node and the voltage of the third node.

公开(公告)号：US20180233547A1

公开(公告)日：2018-08-16

申请号：US15864049

申请日：2018-01-08

Applicant: Samsung Display Co., LTD.

Inventor： JINKOO CHUNG ,  GUNHEE KIM ,  KYUNGHO KIM ,  SEONG-MIN KIM ,  EUNKYOUNG NAM ,  CHAUNGI CHOI

IPC: H01L27/32

CPC classification number: H01L27/3246 ,  H01L27/3248 ,  H01L27/3258 ,  H01L27/326

Abstract: An organic light emitting display device includes a substrate including an emission region and a non-emission region, an organic light emitting element which emits light, the organic light emitting element including a first electrode disposed on the substrate in the emission region, an organic light emitting layer disposed on the first electrode in the emission region, and a second electrode disposed on the organic light emitting layer, and a via insulation layer disposed on the substrate in the non-emission region thereof, the via insulation layer including an organic insulation material. The via insulation layer defines an opening therein in which the organic light emitting layer of the organic light emitting element is disposed.

公开(公告)号：US20240355269A1

公开(公告)日：2024-10-24

申请号：US18441382

申请日：2024-02-14

Applicant: Samsung Display Co., LTD.

Inventor： KYUNGHO KIM ,  GICHANG LEE

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2300/0426 ,  G09G2310/0267

Abstract: A gate signal masking circuit includes a first switching element including a control electrode connected to a masking node, a first electrode connected to a first node and a second electrode connected to a third node, a second switching element including a control electrode receiving a carry signal, a first electrode receiving a masking signal and a second electrode connected to a fourth node, a third switching element including a control electrode receiving a first enable signal, a first electrode connected to the fourth node and a second electrode connected to the masking node, a fourth switching element including a control electrode receiving a second enable signal, a first electrode connected to the masking node and a second electrode connected to a fifth node and a fifth switching element including a control electrode receiving the carry signal, a first electrode connected to the fifth node and a second electrode.

公开(公告)号：US20240221619A1

公开(公告)日：2024-07-04

申请号：US18396716

申请日：2023-12-27

Applicant: Samsung Display Co., Ltd.

Inventor： JEONGYOON LEE ,  KYUNGHO KIM ,  OK-KYUNG PARK

IPC: G09G3/32

CPC classification number: G09G3/32 ,  G09G2320/0666

Abstract: Provided is a display panel including a transistor, a light emitting element including a first electrode, an intermediate layer disposed on the first electrode, and a second electrode disposed on the intermediate layer, wherein the second electrode is electrically connected to the transistor, a pixel defining film disposed on the first electrode defining an emission opening above a portion of the first electrode and disposed on the first electrode, a separator disposed on the pixel defining film, and a sensing electrode disposed on the separator, wherein the sensing electrode and the second electrode are electrically separated by the separator.

公开(公告)号：US20240215352A1

公开(公告)日：2024-06-27

申请号：US18389876

申请日：2023-12-20

Applicant: Samsung Display Co., Ltd.

Inventor： JEONGYOON LEE ,  KYUNGHO KIM ,  OK-KYUNG PARK

IPC: H10K59/131 ,  H10K59/40

CPC classification number: H10K59/131 ,  H10K59/40

Abstract: Provided is a display device. The display device includes a separator including a first opening region, a first light-emitting device disposed in the first opening and including a first electrode and a second electrode arranged on the first electrode, and a sensing electrode arranged on the separator to overlap the separator in a plan view, wherein a width of the sensing electrode is equal to or less than a width of the separator.