公开(公告)号：US20230413631A1

公开(公告)日：2023-12-21

申请号：US18108518

申请日：2023-02-10

Applicant: Samsung Display Co., LTD.

Inventor： HYUNEOK SHIN ,  DONGMIN LEE ,  YOUNGROK KIM ,  JOONYONG PARK ,  JOON WOO BAE ,  SAMTAE JEONG

IPC: H10K59/131 ,  H10K59/12

CPC classification number: H10K59/1315 ,  H10K59/1201

Abstract: A display device includes a substrate, a metal pattern on the substrate, the metal pattern including a first alloy layer and a first metal layer, wherein the first alloy layer includes a titanium alloy including at least one of copper or zinc and the first metal layer is on the first alloy layer, an active layer on the metal pattern and a gate electrode on the active layer, the gate electrode including a second alloy layer and a second metal layer, wherein the second alloy layer includes a titanium alloy including at least one of copper or zinc and the second metal layer is on the second alloy layer.

公开(公告)号：US20230026562A1

公开(公告)日：2023-01-26

申请号：US17739501

申请日：2022-05-09

Applicant: Samsung Display Co., Ltd.

Inventor： KEUNWOO KIM ,  TAEWOOK KANG ,  JANG-HYUN KIM ,  JOON WOO BAE ,  JAESEOB LEE ,  DONGGYU JIN ,  SANGGUN CHOI

IPC: H01L27/32

Abstract: A display device includes a first transistor, a second transistor electrically connected thereto, n third transistors electrically connected to a gate of the first transistor and connected to each other in series, a capacitor to be charged with a voltage corresponding to a data signal, and a light emitting element, wherein the third transistors include a semiconductor area including a channel area, a source area, a drain area, and a gate overlapping the channel area, wherein the source area or the drain area that is closer to the gate of the first transistor, and that is of the third transistor closest to the gate of the first transistor, includes a first area, and a second area between the first area and the channel area, having a doping concentration that is lower than that of the first area, and having a width that is less than that of the first area.

公开(公告)号：US20240338100A1

公开(公告)日：2024-10-10

申请号：US18418370

申请日：2024-01-22

Applicant: Samsung Display Co., Ltd.

Inventor： HYUNEOK SHIN ,  JOON WOO BAE ,  JUHYUN LEE ,  SAMTAE JEONG ,  YUNG BIN CHUNG

IPC: G06F3/044 ,  G06F3/041

CPC classification number: G06F3/0445 ,  G06F3/0412 ,  G06F3/0446 ,  G06F2203/04112

Abstract: A display device is disclosed that includes a display panel including a light emitting area and a non-light-emitting area adjacent to the light emitting area and an input sensor disposed on the display panel. The input sensor includes a first sensor conductive layer disposed on the display panel, a first sensor insulating layer disposed on the first sensor conductive layer, and a second sensor conductive layer disposed on the first sensor insulating layer. At least one of the first sensor conductive layer and the second sensor conductive layer is provided with a mesh opening defined therethrough, at least one of a side surface of the first sensor conductive layer and a side surface of the second sensor conductive layer is provided with a recessed portion defined therein, and the input sensor further includes a light absorption layer disposed in the recessed portion.

公开(公告)号：US20230075763A1

公开(公告)日：2023-03-09

申请号：US17900625

申请日：2022-08-31

Applicant: Samsung Display Co., LTD.

Inventor： KEUNWOO KIM ,  TAEWOOK KANG ,  JOON WOO BAE ,  YU-GWANG JEONG ,  SUNGWON CHO ,  JAEHWAN CHU ,  SANGGUN CHOI

IPC: H01L27/32 ,  G09G3/3233 ,  G09G3/20 ,  H01L51/56

Abstract: A display device includes: a substrate; and a plurality of pixel circuits on the substrate comprising: an active layer including a first region and a second region; a gate insulating layer on the active layer, the gate insulating layer including a first insulating layer overlapping the first region and the second region, a second insulating layer on the first insulating layer and overlapping the first region, and a third insulating layer on the second insulating layer and overlapping the first region and the second region; and a first conductive layer on the gate insulating layer, the first conductive layer including a first gate electrode overlapping the first region to form a driving transistor, and a second gate electrode overlapping the second region to form a switching transistor.