公开(公告)号：US20160203753A1

公开(公告)日：2016-07-14

申请号：US14750518

申请日：2015-06-25

Applicant: Samsung Display Co., LTD.

Inventor： Hyun-Sik HWANG ,  Bong-Im PARK ,  Jung-Deok SEO ,  Byung-Kook SIM

IPC: G09G3/20

CPC classification number: G09G3/2092 ,  G09G2300/0426 ,  G09G2300/0842 ,  G09G2300/0876 ,  G09G2310/0262 ,  G09G2310/0281 ,  G09G2310/08 ,  G09G2320/0223 ,  G09G2330/028

Abstract: A display apparatus includes a display panel, a gate driver and a data driver. The display panel includes gate lines, data lines and pixels electrically connected to the gate lines and the data lines. The gate driver is disposed adjacent to a first side of the display panel, and outputs a gate signal to the gate line. The data driver is disposed adjacent to the first side of the display panel, and outputs a data voltage to the data line. A gate signal applied to a position having a low resistance-capacitance (“RC”) delay of the gate line has a kickback slice greater than a kickback slice of a gate signal applied to a position having a high RC delay of the gate line. The kickback slice is defined as a portion having a level lower than a gate-on voltage level in a gate pulse of the gate signal.

Abstract translation: 显示装置包括显示面板，门驱动器和数据驱动器。 显示面板包括栅极线，数据线和电连接到栅极线和数据线的像素。 栅极驱动器邻近显示面板的第一侧设置，并将栅极信号输出到栅极线。 数据驱动器设置在显示面板的第一侧附近，并将数据电压输出到数据线。 施加到具有低电阻电容（“RC”）延迟的栅极线的位置的栅极信号具有大于施加到栅极线的高RC延迟的位置的栅极信号的反冲切片的反冲切片。 反冲切片被定义为在栅极信号的栅极脉冲中具有低于栅极导通电压电平的电平的部分。