公开(公告)号：US11892360B2

公开(公告)日：2024-02-06

申请号：US17136240

申请日：2020-12-29

Applicant: STMicroelectronics International N.V.

Inventor： Atul Dwivedi ,  Pijush Kanti Panja

IPC: G01K7/00 ,  H03K17/60

CPC classification number: G01K7/00 ,  H03K17/60 ,  G01K2219/00

Abstract: Circuitry generates base-to-emitter voltages (Vbe1, Vbe2) of two BJTs biased at different current densities, a base-to-emitter voltage (Vbe) of a BJT biased so Vbe is complementary to absolute temperature and has a curved non-linearity across temperature, and base-to-emitter voltages (Vbe1_c, Vbe2_c) of two BJTs biased by a temperature independent constant current and a current proportional to absolute temperature so Vbe2_c−Vbe1_c has the same but opposite curved non-linearity across temperature as Vbe. A sampling circuit samples these voltages and provides them to inputs of a loop filter. Filter outputs are quantized to produce a bitstream. The sampling circuit: when the received bit of the bitstream is zero, causes integration of Vbe1−Vbe2 to produce a voltage proportional to absolute temperature (αΔVbe); and when the received bit of the bitstream is one, causes integration of Vbe2_c−Vbe_Vbe1_c to produce a negative voltage complementary to absolute temperature −Vbe_c without non-linearity across temperature.

公开(公告)号：US11867572B2

公开(公告)日：2024-01-09

申请号：US17521123

申请日：2021-11-08

Applicant: STMicroelectronics International N.V.

Inventor： Pijush Kanti Panja ,  Kallol Chatterjee ,  Atul Dwivedi

IPC: H03K17/14 ,  G01K7/14 ,  G01K7/01 ,  H03K19/018 ,  H03M1/12

CPC classification number: G01K7/14 ,  G01K7/01 ,  H03K17/14 ,  H03K19/018 ,  H03M1/1245

Abstract: A temperature sensing circuit a switched capacitor circuit selectively samples ΔVbe and Vbe voltages and provides the sampled voltages to inputs of an integrator. A quantization circuit quantizes outputs of the integrator to produce a bitstream. When a most recent bit of the bitstream is a logic zero, operation includes sampling and integration of ΔVbe a first given number of times to produce a voltage proportional to absolute temperature. When the most recent bit of the bitstream is a logic one, operation includes cause sampling and integration of Vbe a second given number of times to produce a voltage complementary to absolute temperature. A low pass filter and decimator filters and decimates the bitstream produced by the quantization circuit to produce a signal indicative of a temperature of a chip into which the temperature sensing circuit is placed.

公开(公告)号：US12209919B1

公开(公告)日：2025-01-28

申请号：US18406551

申请日：2024-01-08

Applicant: STMicroelectronics International N.V.

Inventor： Pijush Kanti Panja ,  Kallol Chatterjee ,  Atul Dwivedi

IPC: H02K17/14 ,  G01K7/01 ,  H03K17/14 ,  H03K19/003 ,  H03M1/12

Abstract: A method for determining temperature of a chip, includes generating a first voltage and a second voltage using a pair of bipolar-junction transistors, and generating a third voltage using another bipolar-junction transistor. When a most recent bit of a bitstream is a logic-zero, the difference between the first and second voltages is sampled using a switched-capacitor input-sampling circuit, and a difference between the first and second voltages is integrated, to produce a proportional-to-absolute-temperature voltage. The proportional-to-absolute-temperature voltage is quantized to produce a next bit of the bitstream. When the most recent bit of the bitstream is a logic-one, the third voltage is sampled using the switched-capacitor input-sampling circuit, and the third voltage is integrated, to produce a complementary-to-absolute-temperature voltage. The complementary-to-absolute-temperature voltage is quantized to produce a next bit of the bitstream. The bitstream is filtered and decimated to produce an output code representative of the temperature of the chip.

公开(公告)号：US10530366B1

公开(公告)日：2020-01-07

申请号：US16503960

申请日：2019-07-05

Applicant: STMicroelectronics International N.V.

Inventor： Atul Dwivedi ,  Paras Garg ,  Kallol Chatterjee

IPC: H03K19/007 ,  H03K19/0185 ,  G01R31/317

Abstract: A low-voltage-differential-signaling (LVDS) fault detector includes first and second LVDS lines, and a window comparator provides a first output indicating whether a difference between voltages at the first and second LVDS lines is greater than a threshold voltage, and a second output indicating whether a difference between the voltages at the second and first LVDS lines is greater than the threshold voltage. A charge circuit charges a capacitive node when either the first or second output is at a logic low, and discharges the capacitive node when neither the first nor second output is at a logic low. A Schmitt trigger generates a fault flag if charge on the capacitive node falls to a threshold.