公开(公告)号：US10860049B2

公开(公告)日：2020-12-08

申请号：US16594405

申请日：2019-10-07

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Regis Roubadia ,  Ludovic Girardeau

IPC: H04W4/40 ,  G06F1/025 ,  H03K19/0185

Abstract: A signal generation circuit generates first and second non-overlapping digital signals from an input pulse signal. A first digital circuit includes: a first logical OR gate receiving the second digital signal and the input pulse signal to generate a third digital signal; and a second logical OR gate receiving the input pulse signal and a delayed version of the third digital signal to generate the first digital signal. A second digital circuit includes: a first logical AND gate receiving the first digital signal and the input pulse signal to generate a fourth digital signal; and a second logical AND gate receiving the input pulse signal and the fourth digital signal to generate the second digital signal.

公开(公告)号：US10819236B2

公开(公告)日：2020-10-27

申请号：US16594662

申请日：2019-10-07

Applicant: STMicroelectronics (Rousset) SAS

Inventor： Regis Roubadia

IPC: H02M1/08 ,  H02M3/158

Abstract: A driver circuit generates a drive signal having a first and second voltage state for controlling a power transistor switch coupled to a power supply node. A control circuit operates to sense a supply voltage at the power supply node and compare the sensed supply voltage to one or more voltage thresholds. In response to the comparison, the control circuit adjusts a switching slope of the drive signal from the first voltage state to the second voltage state.