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公开(公告)号:US20240405146A1
公开(公告)日:2024-12-05
申请号:US18799088
申请日:2024-08-09
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Antonin ZIMMER , Dominique GOLANSKI , Raul Andres BIANCHI
IPC: H01L31/107
Abstract: A photodiode is formed in a semiconductor substrate of a first conductivity type. The photodiode includes a first region having a substantially hemispherical shape and a substantially hemispherical core of a second conductivity type, different from the first conductivity type, within the first region. An epitaxial layer covers the semiconductor substrate and buries the first region and core.
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公开(公告)号:US20220085084A1
公开(公告)日:2022-03-17
申请号:US17471049
申请日:2021-09-09
Inventor: Raul Andres BIANCHI , Marios BARLAS , Alexandre LOPEZ , Bastien MAMDY , Bruce RAE , Isobel NICHOLSON
IPC: H01L27/146
Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.
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公开(公告)号:US20210057426A1
公开(公告)日:2021-02-25
申请号:US17092551
申请日:2020-11-09
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Fausto PIAZZA , Sebastien LAGRASTA , Raul Andres BIANCHI , Simon JEANNOT
IPC: H01L27/11546 , H01L21/28 , H01L27/06 , H01L49/02 , H01L21/02 , H01L21/3205 , H01L21/3213 , H01L27/11521 , H01L29/49 , H01L29/66
Abstract: An integrated circuit includes a high-voltage MOS (HV) transistor and a capacitor supported by a semiconductor substrate. A gate stack of the HV transistor includes a first insulating layer over the semiconductor layer and a gate electrode formed from a first polysilicon. The capacitor includes a first electrode made of the first polysilicon and a second electrode made of a second polysilicon and at least partly resting over the first electrode. A first polysilicon layer deposited over the semiconductor substrate is patterned to form the first polysilicon of the gate electrode and first electrode, respectively. A second polysilicon layer deposited over the semiconductor substrate is patterned to form the second polysilicon of the second electrode. Silicon oxide spacers laterally border the second electrode and the gate stack of the HV transistor. Silicon nitride spacers border the silicon oxide spacers.
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公开(公告)号:US20240339464A1
公开(公告)日:2024-10-10
申请号:US18744359
申请日:2024-06-14
Inventor: Raul Andres BIANCHI , Marios BARLAS , Alexandre LOPEZ , Bastien MAMDY , Bruce RAE , Isobel NICHOLSON
IPC: H01L27/146 , G02B5/18
CPC classification number: H01L27/14605 , H01L27/1462 , G02B5/18 , G02B5/1814 , G02B5/1819 , G02B5/1828 , G02B5/1842 , H01L27/14607 , H01L27/1461 , H01L27/1463 , H01L27/1464
Abstract: The present disclosure relates to a pixel comprising: a photodiode comprising a portion of a substrate of a semiconductor material, extending vertically from a first face of the substrate to a second face of the substrate configured to receive light; a layer of a first material covering each of the lateral surfaces of the portion; a layer of a second material covering the portion on the side of the first face, first and second material having refractive indexes lower than that of the semiconductor material; and a diffractive structure disposed on a face of the photodiode on the side of the second face.
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公开(公告)号:US20220310867A1
公开(公告)日:2022-09-29
申请号:US17702186
申请日:2022-03-23
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Antonin ZIMMER , Dominique GOLANSKI , Raul Andres BIANCHI
IPC: H01L31/107
Abstract: A photodiode is formed in a semiconductor substrate of a first conductivity type. The photodiode includes a first region having a substantially hemispherical shape and a substantially hemispherical core of a second conductivity type, different from the first conductivity type, within the first region. An epitaxial layer covers the semiconductor substrate and buries the first region and core.
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公开(公告)号:US20210105427A1
公开(公告)日:2021-04-08
申请号:US17063192
申请日:2020-10-05
Inventor: Raul Andres BIANCHI , Matteo Maria VIGNETTI , Bruce RAE
IPC: H04N5/3745 , H04N5/378
Abstract: The present disclosure relates to a device that includes a photodiode having a first terminal that is coupled by a resistor to a first rail configured to receive a high supply potential and a second terminal that is coupled by a switch to a second rail configured to receive a reference potential. A read circuit is configured to provide a pulse when the photodiode enters into avalanche, and a control circuit is configured to control an opening of the switch in response to a beginning of the pulse and to control a closing of the switch in response to an end of the pulse.
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公开(公告)号:US20180233511A1
公开(公告)日:2018-08-16
申请号:US15954874
申请日:2018-04-17
Applicant: STMicroelectronics (Crolles 2) SAS
Inventor: Fausto PIAZZA , Sebastien LAGRASTA , Raul Andres BIANCHI , Simon JEANNOT
IPC: H01L27/11546 , H01L29/66 , H01L21/02 , H01L29/49 , H01L49/02 , H01L27/11521 , H01L27/06 , H01L21/3213 , H01L21/3205 , H01L21/28 , H01L21/8234 , H01L27/11541
Abstract: An integrated circuit includes a high-voltage MOS (HV) transistor and a capacitor supported by a semiconductor substrate. A gate stack of the HV transistor includes a first insulating layer over the semiconductor layer and a gate electrode formed from a first polysilicon. The capacitor includes a first electrode made of the first polysilicon and a second electrode made of a second polysilicon and at least partly resting over the first electrode. A first polysilicon layer deposited over the semiconductor substrate is patterned to form the first polysilicon of the gate electrode and first electrode, respectively. A second polysilicon layer deposited over the semiconductor substrate is patterned to form the second polysilicon of the second electrode. Silicon oxide spacers laterally border the second electrode and the gate stack of the HV transistor. Silicon nitride spacers border the silicon oxide spacers.
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公开(公告)号:US20140077864A1
公开(公告)日:2014-03-20
申请号:US14024876
申请日:2013-09-12
Applicant: STMicroelectronics Crolles 2 SAS
Inventor: Raul Andres BIANCHI
IPC: G05F3/24
CPC classification number: G05F3/245 , G01K7/01 , H01L27/1203
Abstract: An electronic circuit for providing a voltage or a current linearly dependent on temperature within a temperature range, including at least two identical MOS transistors conducting the same drain current, each transistor having a fully depleted channel which is separated from a doped semiconductor region by an insulating layer, the conductive types of the dopants of said doped semiconductor regions being different, said voltage or said current being proportional to the difference between the gate-source/drain voltages of the two transistors.
Abstract translation: 一种电子电路,用于在包括至少两个相同的漏极电流的相同的MOS晶体管的温度范围内提供线性上依赖于温度的电压或电流,每个晶体管具有完全耗尽的通道,其通过绝缘体与掺杂半导体区域分离 所述掺杂半导体区域的掺杂剂的导电类型不同,所述电压或所述电流与两个晶体管的栅极 - 源极/漏极电压之间的差异成比例。
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