公开(公告)号：US20190221542A1

公开(公告)日：2019-07-18

申请号：US16058549

申请日：2018-08-08

Applicant: SK hynix Inc.

Inventor： Kyung Hwan CHO ,  Ga Hyun NO ,  Jin Kyoung PARK ,  Yong Kuk KIM

IPC: H01L25/065

CPC classification number: H01L25/0652 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06562 ,  H01L2225/06586

Abstract: A semiconductor package may include a first chip stack, a second chip stack, and a third chip stack. The third chip stack may include third semiconductor chips, the third chip stack coupled to both of the first and second chip stacks.