公开(公告)号：US11531605B2

公开(公告)日：2022-12-20

申请号：US16677290

申请日：2019-11-07

申请人： SK hynix Inc.

发明人： Alexander Zapotylok ,  Sergei Peniaz

IPC分类号： G06F11/20 ,  G06F3/06

摘要： A scheme for handling program errors is provided for a memory system which includes a memory device and a controller including firmware and a memory interface. The firmware issues commands for program operations to the memory interface. After detecting a failed program operation in a particular memory block, the firmware reroutes that program operation to a different location in a different memory block and takes further action to reduce the likelihood of a subsequent error occurring in the same memory block in which the failed program operation occurred.

公开(公告)号：US12045131B2

公开(公告)日：2024-07-23

申请号：US18065564

申请日：2022-12-13

申请人： SK hynix Inc.

发明人： Dmitri Zeleniak ,  Pavel Chertkov ,  Valery Abramov ,  Sergei Peniaz ,  Sergei Musin

IPC分类号： G06F11/10 ,  G06F11/27 ,  G06F11/30

CPC分类号： G06F11/1048 ,  G06F11/27 ,  G06F11/3037

摘要： Techniques for injecting memory read errors may include obtaining an error injection profile from a test library. A defense level in the defense hierarchy can be selected for execution according to the probabilities in the error injection profile. One or more errors can be injected into read operations of the storage device according to the defense-level read retry vector of the selected defense level, and a defense algorithm of the selected defense level is executed to recover read data of the read operations.

公开(公告)号：US20240193039A1

公开(公告)日：2024-06-13

申请号：US18065564

申请日：2022-12-13

申请人： SK hynix Inc.

发明人： Dmitri Zeleniak ,  Pavel Chertkov ,  Valery Abramov ,  Sergei Peniaz ,  Sergei Musin

IPC分类号： G06F11/10 ,  G06F11/27 ,  G06F11/30

CPC分类号： G06F11/1048 ,  G06F11/27 ,  G06F11/3037

摘要： Techniques for injecting memory read errors may include obtaining an error injection profile from a test library. A defense level in the defense hierarchy can be selected for execution according to the probabilities in the error injection profile. One or more errors can be injected into read operations of the storage device according to the defense-level read retry vector of the selected defense level, and a defense algorithm of the selected defense level is executed to recover read data of the read operations.

公开(公告)号：US11532372B2

公开(公告)日：2022-12-20

申请号：US16503914

申请日：2019-07-05

申请人： SK hynix Inc.

发明人： Andrei Konan ,  Sergei Peniaz

IPC分类号： G11C29/38 ,  G06F13/42

摘要： Memory systems and method of operating the same enable debugging of a memory system with vendor unique (VU) commands without using a physical cable connection to a debugging port on the memory system. In one aspect, a Universal Asynchronous Receiver-Transmitter (UART) protocol is serialized over a VU host protocol. In another aspect, Joint Test Action Group (JTAG) may be performed over UART or serial advanced technology attachment (SATA).