公开(公告)号：US20250037752A1

公开(公告)日：2025-01-30

申请号：US18539060

申请日：2023-12-13

Applicant: SK hynix Inc.

Inventor： Joon Hong PARK ,  Jeong Je PARK ,  Sang Sic YOON ,  Jong Hyuck CHOI

IPC: G11C11/4076

Abstract: A semiconductor device includes a frequency division circuit configured to generate a first division clock and a second division clock by dividing a frequency of a clock, and an internal command generation circuit configured to generate an internal command based on a command in synchronization with the first division clock and the second division clock, configured to latch, in a pipe latch, a phase detection signal that is generated based on the timing at which the command is received, and configured to compensate for generation timing of the internal command based on the phase detection signal that has been latched in the pipe latch.