公开(公告)号：US20130256887A1

公开(公告)日：2013-10-03

申请号：US13905254

申请日：2013-05-30

Applicant: SK hynix Inc.

Inventor： Kyu Won LEE ,  Cheol Ho JOH ,  Eun-Hye DO ,  Ji Eun KIM ,  Hee Min SHIN

IPC: H01L23/48

CPC classification number: H01L23/481 ,  H01L21/561 ,  H01L23/3128 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L24/97 ,  H01L25/03 ,  H01L25/105 ,  H01L25/50 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/97 ,  H01L2225/1023 ,  H01L2225/1064 ,  H01L2225/1076 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/10161 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/3511 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A stacked semiconductor package includes a semiconductor package module including a plurality of semiconductor packages each of which has a first surface, a second surface facing away from the first surface, side surfaces connecting the first surface and the second surface and through-holes formed on the side surfaces to pass through the first surface and the second surface and which are stacked such that their through-holes vertically connect with one another, and adhesive members which are formed between the semiconductor packages and attach the semiconductor packages to one another, a main substrate supporting the semiconductor package module and formed, on a third surface thereof facing the semiconductor package module, with main connection pads which are aligned with the through-holes, and conductive connection members formed in the through-holes and electrically connecting the semiconductor packages with the main connection pads.

Abstract translation: 堆叠半导体封装包括半导体封装模块，其包括多个半导体封装，每个半导体封装具有第一表面，背离第一表面的第二表面，连接第一表面和第二表面的侧表面和形成在第一表面上的通孔 侧表面通过第一表面和第二表面并且堆叠成使得它们的通孔彼此垂直连接;以及粘合构件，其形成在半导体封装之间并将半导体封装彼此附接，主基板 支撑半导体封装模块，并在其面向半导体封装模块的第三表面上形成与通孔对准的主连接焊盘，以及形成在通孔中的导电连接构件，并将半导体封装与 主连接垫