公开(公告)号：US20160379961A1

公开(公告)日：2016-12-29

申请号：US14882557

申请日：2015-10-14

Applicant: SK hynix Inc.

Inventor： Kyu Won LEE ,  Ki Ill MOON ,  Cheol Woo HAN

IPC: H01L25/065

CPC classification number: H01L25/0657 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49822 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/73253 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06558 ,  H01L2225/06562 ,  H01L2225/06572 ,  H01L2225/06586 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/00012

Abstract: Disclosed herein are semiconductor packages. A semiconductor package may include a substrate configured to include a first face and a second face opposite the first face and to have a recess formed in the first face. The semiconductor package may include a first semiconductor chip disposed on the bottom of the recess. The semiconductor package may include a second semiconductor chip disposed on the second face of the substrate. The semiconductor package may include a third semiconductor chip disposed over the first face of the substrate and the first semiconductor chip. The semiconductor package may include a fourth semiconductor chip disposed over the third semiconductor chip.

Abstract translation: 这里公开了半导体封装。 半导体封装可以包括被配置为包括第一面和与第一面相对的第二面的衬底，并且在第一面中形成凹部。 半导体封装可以包括设置在凹部底部的第一半导体芯片。 半导体封装可以包括设置在衬底的第二面上的第二半导体芯片。 半导体封装可以包括设置在衬底的第一面和第一半导体芯片上的第三半导体芯片。 半导体封装可以包括设置在第三半导体芯片上的第四半导体芯片。