Methods and system for an integrated circuit

    公开(公告)号:US11138144B2

    公开(公告)日:2021-10-05

    申请号:US16947050

    申请日:2020-07-16

    Abstract: Various embodiments of the present technology may provide methods and system for an integrated circuit. The system may provide a plurality of integrated circuits (i.e., slave devices) connected to and configured to communicate with a host device. Each integrated circuit may comprise a register storing a common default address. Each integrated circuit may further comprise an interface circuit configured to overwrite the default address of one integrated circuit with a new address while preventing changes to the remaining integrated circuits.

    Methods and system for communication between a host device and slave devices

    公开(公告)号:US10783101B1

    公开(公告)日:2020-09-22

    申请号:US16453022

    申请日:2019-06-26

    Abstract: Various embodiments of the present technology may provide methods and system for communication between a host device and slave devices. The system may provide a plurality of integrated circuits (i.e., slave devices) connected to and configured to communicate with a host device (i.e., a master device). Each integrated circuit may provide a register to store a unique slave address, a global slave address, and an order number. The host device may communicate with each slave device individually using the unique slave address and communicate with all slave devices simultaneously using the global slave address and the order number.

    Methods and system for an integrated circuit

    公开(公告)号:US10719477B1

    公开(公告)日:2020-07-21

    申请号:US16447008

    申请日:2019-06-20

    Abstract: Various embodiments of the present technology may provide methods and system for an integrated circuit. The system may provide a plurality of integrated circuits (i.e., slave devices) connected to and configured to communicate with a host device. Each integrated circuit may comprise a register storing a common default address. Each integrated circuit may further comprise an interface circuit configured to overwrite the default address of one integrated circuit with a new address while preventing changes to the remaining integrated circuits.

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