METHODS AND APPARATUS FOR SELECTIVE HISTOGRAMMING

    公开(公告)号:US20210294274A1

    公开(公告)日:2021-09-23

    申请号:US17247409

    申请日:2020-12-10

    Abstract: Methods and apparatus for selective histogramming are configured to generate a plurality of histograms over a number of phases using a number of physical bins, wherein the range of a first histogram is greater than a range of a second, subsequent histogram, and wherein each physical bin of the first histogram is defined by a number N of codes and each physical bin of the second histogram is defined by a number M of codes, where M is less than N.

    LIDAR SYSTEM WITH DYNAMIC RESOLUTION

    公开(公告)号:US20210223372A1

    公开(公告)日:2021-07-22

    申请号:US16948380

    申请日:2020-09-16

    Abstract: An imaging system may include a silicon photomultiplier with single-photon avalanche diodes (SPADs). The imaging system may be a LIDAR imaging system with LIDAR processing circuitry. To reduce memory requirements in the LIDAR processing circuitry, a dynamic resolution storage scheme may be used. The LIDAR processing circuitry may include autonomous dynamic resolution circuitry that receives input from a time-to-digital converter (TDC). The autonomous dynamic resolution circuitry may include a plurality of memory banks having different resolutions. Based on the magnitude of the input from the TDC, an appropriate memory bank may be selected. In parallel, an address encoder may select a memory bin based on the input from the TDC.

    LIDAR System with Dynamic Resolution

    公开(公告)号:US20250012903A1

    公开(公告)日:2025-01-09

    申请号:US18890510

    申请日:2024-09-19

    Abstract: An imaging system may include a silicon photomultiplier with single-photon avalanche diodes (SPADs). The imaging system may be a LIDAR imaging system with LIDAR processing circuitry. To reduce memory requirements in the LIDAR processing circuitry, a dynamic resolution storage scheme may be used. The LIDAR processing circuitry may include autonomous dynamic resolution circuitry that receives input from a time-to-digital converter (TDC). The autonomous dynamic resolution circuitry may include a plurality of memory banks having different resolutions. Based on the magnitude of the input from the TDC, an appropriate memory bank may be selected. In parallel, an address encoder may select a memory bin based on the input from the TDC.

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