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公开(公告)号:US20220283778A1
公开(公告)日:2022-09-08
申请号:US17401453
申请日:2021-08-13
Inventor: Yeongjae CHOI , Seungkyu CHOI , Lee-Sup KIM , Jaekang SHIN
Abstract: An encoding method includes receiving input data represented by a 16-bit half floating point, adjusting a number of bits of an exponent and a mantissa of the input data to split the input data into 4-bit units, and encoding the input data in which the number of bits has been adjusted such that the exponent is a multiple of “4”.
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公开(公告)号:US20190122106A1
公开(公告)日:2019-04-25
申请号:US16106703
申请日:2018-08-21
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junhaeng LEE , Hyunsun PARK , Yeongjae CHOI
Abstract: A processor-implemented neural network method includes calculating individual update values for a weight assigned to a connection relationship between nodes included in a neural network; generating an accumulated update value by accumulating the individual update values in an accumulation buffer; and training the neural network by updating the weight using the accumulated update value in response to the accumulated update value being equal to or greater than a threshold value.
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公开(公告)号:US20230102087A1
公开(公告)日:2023-03-30
申请号:US17993740
申请日:2022-11-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Junhaeng LEE , Hyunsun PARK , Yeongjae CHOI
Abstract: A processor-implemented neural network method includes calculating individual update values for a weight assigned to a connection relationship between nodes included in a neural network; generating an accumulated update value by adding the individual update values; and training the neural network by updating the weight using the accumulated update value in response to the accumulated update value being equal to or greater than a threshold value, wherein the threshold value is a value of 2n of an n-th bit of the weight, where the n-th bit is a bit of lesser significance than a bit in the weight representing a largest magnitude bit among all bits of the weight
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公开(公告)号:US20190065896A1
公开(公告)日:2019-02-28
申请号:US16110664
申请日:2018-08-23
Inventor: Sehwan LEE , Leesup KIM , Hyeonuk KIM , Jaehyeong SIM , Yeongjae CHOI
CPC classification number: G06K9/623 , G06K9/6251 , G06K9/6267 , G06N3/04 , G06N3/0454 , G06N3/063
Abstract: A processor-implemented neural network method includes: obtaining, from a memory, data an input feature map and kernels having a binary-weight, wherein the kernels are to be processed in a layer of a neural network; decomposing each of the kernels into a first type sub-kernel reconstructed with weights of a same sign, and a second type sub-kernel for correcting a difference between a respective kernel, among the kernels, and the first type sub-kernel; performing a convolution operation by using the input feature map and the first type sub-kernels and the second type sub-kernels decomposed from each of the kernels; and obtaining an output feature map by combining results of the convolution operation.
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公开(公告)号:US20200285887A1
公开(公告)日:2020-09-10
申请号:US16884232
申请日:2020-05-27
Inventor: Sehwan LEE , Leesup KIM , Hyeonuk KIM , Jaehyeong SIM , Yeongjae CHOI
Abstract: A processor-implemented neural network method includes: obtaining, from a memory, data of an input feature map and kernels having a binary-weight, wherein the kernels are to be processed in a layer of a neural network; decomposing each of the kernels into a first type sub-kernel reconstructed with weights of a same sign, and a second type sub-kernel for correcting a difference between a respective kernel, among the kernels, and the first type sub-kernel; performing a convolution operation by using the input feature map and the first type sub-kernels and the second type sub-kernels decomposed from each of the kernels; and obtaining an output feature map by combining results of the convolution operation.
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