Fan-out semiconductor package
    1.
    发明授权

    公开(公告)号:US11195790B2

    公开(公告)日:2021-12-07

    申请号:US16684907

    申请日:2019-11-15

    Abstract: A fan-out semiconductor package includes: a frame including insulating layers, wiring layers, and connection via layers, and having a recess portion and a stopper layer disposed on a bottom surface of the recess portion; a semiconductor chip disposed in the recess portion; a resin layer disposed on an active surface of the semiconductor chip; an encapsulant covering at least portions of side surfaces of the semiconductor chip and the resin layer and filling at least portions of the recess portion; a first redistribution layer disposed on the resin layer and the encapsulant; first redistribution vias penetrating through the resin layer to fill via holes in the resin layer exposing at least portions of the connection pads and electrically connecting the connection pads and the first redistribution layer to each other; and a connection member disposed on the resin layer and the encapsulant and including one or more second redistribution layers.

    Fan-out semiconductor package module

    公开(公告)号:US10475776B2

    公开(公告)日:2019-11-12

    申请号:US15900568

    申请日:2018-02-20

    Abstract: A fan-out semiconductor package module includes a core member having first and second through-holes. A semiconductor chip is in the first through-hole and has an active surface with a connection pad and an inactive surface opposing the active surface. Another passive component is in the second through-hole. An first encapsulant covers at least portions of the core member and the passive component, and fills at least a portion of the second through-hole. A reinforcing member is on the first encapsulant. A second encapsulant covers at least a portion of the semiconductor chip, and fills at least a portion of the first through-hole. A connection member is on the core member, the active surface of the semiconductor chip, and the passive component, and includes a redistribution layer electrically connected to the connection pad and the passive component.

    Semiconductor package including organic interposer

    公开(公告)号:US10541187B2

    公开(公告)日:2020-01-21

    申请号:US15950926

    申请日:2018-04-11

    Abstract: A semiconductor package including an organic interposer includes: first and second semiconductor chips each having active surfaces having connection pads disposed thereon; the organic interposer disposed on the active surfaces of the first and second semiconductor chips and including a wiring layer electrically connected to the connection pads; barrier layers disposed onside surfaces of the first and second semiconductor chips; and an encapsulant encapsulating at least portions of the first and second semiconductor chips.

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