公开(公告)号：US20180054383A1

公开(公告)日：2018-02-22

申请号：US15678326

申请日：2017-08-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won Chang LEE ,  Joon Ho SONG ,  Yong Seok CHOI

IPC: H04L12/725 ,  H04Q11/00

CPC classification number: H04L45/30 ,  H04L45/24 ,  H04Q11/00 ,  H04Q2213/053 ,  H04Q2213/13107 ,  H04Q2213/13396

Abstract: A digital signal processor (DSP) interface apparatus capable of variably setting an interconnection between a DSP and a plurality of hardware devices and a method of controlling the same are provided. The DSP interface apparatus includes a path setter configured to set a data transmission path between at least one of a plurality of hardware devices and a DSP; and a controller configured to control the path setter to set the data transmission path by connecting at least one of a plurality of operation parts and a memory of the DSP and at least one of the plurality of hardware devices based on predetermined configuration information.

公开(公告)号：US20130227211A1

公开(公告)日：2013-08-29

申请号：US13661635

申请日：2012-10-26

Applicant: Samsung Electronics Co., Ltd.

Inventor： Won Chang LEE

IPC: G06F12/00

CPC classification number: G11C8/10 ,  G06F13/16 ,  G06F13/1605

Abstract: A data decoding apparatus is provided, which includes at least one processor block, at least one hardware block, and a memory processing unit to control the at least one processor block or the at least one hardware block to access a memory and to read or write data with minimum delay.

Abstract translation: 提供一种数据解码装置，其包括至少一个处理器块，至少一个硬件块和存储器处理单元，用于控制至少一个处理器块或至少一个硬件块以访问存储器并读取或写入 具有最小延迟的数据。

公开(公告)号：US20180090047A1

公开(公告)日：2018-03-29

申请号：US15708704

申请日：2017-09-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yong Seok CHOI ,  Do-Hyung KIM ,  Joon Ho SONG ,  Sang Jo LEE ,  Won Chang LEE

IPC: G09G3/20

Abstract: It is an aspect of the present disclosure to provide an image processing apparatus, a display apparatus and a method of controlling of the display apparatus capable of preventing a rapid decrease in the image quality of image data.In accordance with an example aspect of the present disclosure, a display apparatus comprises: a plurality of image processing modules, each image processing module configured to perform an image processing process; a controller configured to output image data processed by any one image processing module of the plurality of image processing modules, based on state information of the plurality of image processing modules; and a display configured to display the output image data.

公开(公告)号：US20140313213A1

公开(公告)日：2014-10-23

申请号：US14084176

申请日：2013-11-19

Applicant: Industry-Academia Cooperation Group Of Sejong University ,  Samsung Electronics Co., Ltd.

Inventor： Won Chang LEE ,  Gi Ho Park ,  Do Hyung Kim ,  Shi Hwa Lee ,  Seong Uk Jeong

IPC: G06T1/60

CPC classification number: G06T1/60

Abstract: A memory apparatus may include a tile generator configured to generate a plurality of tiles by dividing a plurality of pixels constituting input data based on a predetermined pixel unit, and a tile storage configured to store the plurality of tiles by sequentially enumerating luminance information and chrominance information about pixels included in the plurality of tiles.

Abstract translation: 存储装置可以包括瓦片发生器，其被配置为通过基于预定像素单元划分构成输入数据的多个像素来生成多个瓦片;以及瓦片存储器，被配置为通过顺序地列举亮度信息和色度信息来存储多个瓦片 关于包括在多个瓷砖中的像素。