Voltage-controlled oscillator
    1.
    发明授权

    公开(公告)号:US11362623B2

    公开(公告)日:2022-06-14

    申请号:US17082159

    申请日:2020-10-28

    Abstract: A voltage-controlled oscillator includes a first transistor, a second transistor, an inductive impedance element, a first variable capacitive impedance element, and a second variable capacitive impedance element. The first transistor has a source coupled to a first power source, a drain coupled to a first node, and a gate coupled to a second node. The second transistor has a source coupled to the first power source, a drain coupled to the second node, and a gate coupled to the first node. The inductive impedance element has a first terminal coupled to the first node and a second terminal coupled to the second node. The first variable capacitive impedance element has a first terminal coupled to the first node and a second terminal coupled to a third node. The second variable capacitive impedance element has a first terminal coupled to the second node and a second terminal coupled to the third node.

    VOLTAGE-CONTROLLED OSCILLATOR
    2.
    发明申请

    公开(公告)号:US20210167727A1

    公开(公告)日:2021-06-03

    申请号:US17082159

    申请日:2020-10-28

    Abstract: A voltage-controlled oscillator includes a first transistor, a second transistor, an inductive impedance element, a first variable capacitive impedance element, and a second variable capacitive impedance element. The first transistor has a source coupled to a first power source, a drain coupled to a first node, and a gate coupled to a second node. The second transistor has a source coupled to the first power source, a drain coupled to the second node, and a gate coupled to the first node. The inductive impedance element has a first terminal coupled to the first node and a second terminal coupled to the second node. The first variable capacitive impedance element has a first terminal coupled to the first node and a second terminal coupled to a third node. The second variable capacitive impedance element has a first terminal coupled to the second node and a second terminal coupled to the third node.

    Power amplifier
    3.
    发明授权

    公开(公告)号:US11043919B2

    公开(公告)日:2021-06-22

    申请号:US16522866

    申请日:2019-07-26

    Abstract: A power amplifier includes a first bias circuit including a first and third transistor, a first sub-bias circuit, and an amplifying circuit including a fourth transistor. In the first bias circuit, a second terminal of the first transistor and a second terminal of the first sub-bias circuit are grounded, a control terminal of the first transistor is connected to a control terminal of the first sub-bias circuit, a first terminal of the first sub-bias circuit is connected to a constant voltage terminal, a first terminal of the first transistor is connected to a second terminal of the third transistor, a first terminal of the third transistor is connected to a control terminal of the third transistor. The amplifying circuit amplifies an input signal power based on a first bias signal from the first bias circuit to a control terminal of the fourth transistor.

    POWER AMPLIFIER
    4.
    发明申请
    POWER AMPLIFIER 审中-公开

    公开(公告)号:US20200036340A1

    公开(公告)日:2020-01-30

    申请号:US16522866

    申请日:2019-07-26

    Abstract: A power amplifier includes a first bias circuit including a first and third transistor, a first sub-bias circuit, and an amplifying circuit including a fourth transistor. In the first bias circuit, a second terminal of the first transistor and a second terminal of the first sub-bias circuit are grounded, a control terminal of the first transistor is connected to a control terminal of the first sub-bias circuit, a first terminal of the first sub-bias circuit is connected to a constant voltage terminal, a first terminal of the first transistor is connected to a second terminal of the third transistor, a first terminal of the third transistor is connected to a control terminal of the third transistor. The amplifying circuit amplifies an input signal power based on a first bias signal from the first bias circuit to a control terminal of the fourth transistor.

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