METHOD FOR EXPANDING DISPLAY OF ELECTRONIC DEVICE, AND ELECTRONIC DEVICE FOR SUPPORTING SAME

    公开(公告)号:US20240242648A1

    公开(公告)日:2024-07-18

    申请号:US18618106

    申请日:2024-03-27

    IPC分类号: G09G3/00 G06F3/04886

    摘要: An electronic device is provided. The electronic device includes a display, memory storing one or more computer programs, and one or more processors communicatively coupled to the display and the memory, wherein the one or more computer programs include computer-executable instructions that, when executed by the one or more processors, cause the electronic device to control the display to display a first screen in a first area of the display during a first state in which a second area among the first area and the second area of the display is not exposed to an outside of the electronic device, detect an event in a state in which the first screen is displayed in the first area, control, based on detection of the event, the display to display a first object corresponding to the event in a partial area of the first area, the first object being displayed in at least a part of the first screen, identify a first gesture input of a user in an area in which the first object is displayed, in a state in which an area ratio of a size of the first object to a size of the first area is equal to or greater than a designated ratio, and control, in response to the identification of the first gesture input, the electronic device to change a state of the display from the first state to a second state in which the first area and the second area of the display are exposed to the outside of the electronic device.

    METHOD AND SYSTEM FOR DESIGNING LAYOUT OF INTEGRATED CIRCUIT

    公开(公告)号:US20240193340A1

    公开(公告)日:2024-06-13

    申请号:US18535160

    申请日:2023-12-11

    发明人: Sunghoon LEE

    IPC分类号: G06F30/392 G06F30/394

    CPC分类号: G06F30/392 G06F30/394

    摘要: A method of designing a layout of an integrated circuit includes generating floorplan data by performing floorplan based on input data for the integrated circuit, searching for a path between a first point and a second point, which are specified, the searching based on the floorplan data, and positioning components of the layout based on a result of the searching. The searching for the path includes distinguishing based on the floorplan data a first region where routing is possible from a second region where the routing is not possible, receiving position data on the first point and the second point, and searching for a shortest path between the first point and the second point, on the first region.

    SEMICONDUCTOR CHIP DESIGN METHOD AND COMPUTING DEVICE FOR PERFORMING THE SAME

    公开(公告)号:US20220012403A1

    公开(公告)日:2022-01-13

    申请号:US17171267

    申请日:2021-02-09

    发明人: Sunghoon LEE

    IPC分类号: G06F30/398 G06F30/394

    摘要: A method of designing a semiconductor chip includes: acquiring first data including information about arrangement of a plurality of cells on the semiconductor chip; acquiring second data including information about routing between the plurality of cells and power and signal lines; and outputting a verification result by detecting an error of arrangement of the plurality of cells based on matching of the first data and the second data.

    BEAM EXPANDER AND DISPLAY INCLUDING THE SAME

    公开(公告)号:US20190113761A1

    公开(公告)日:2019-04-18

    申请号:US15937288

    申请日:2018-03-27

    IPC分类号: G02B27/09 G02B27/30 F21V8/00

    摘要: A beam expander and a displays including the beam expander are provided. The beam expander includes a holographic optical element (HOE) configured to generate collimated light by diffracting incident light incident thereon from a light source that emits coherent light. The beam expander also includes a diffraction optical element that diffracts light received from the HOE. The light source and the HOE may face each other with the diffraction optical element therebetween. Both the light source and the HOE may be arranged on a side of the diffraction optical element. The light source may be arranged above or below the diffraction optical element.