公开(公告)号：US20210384188A1

公开(公告)日：2021-12-09

申请号：US17144354

申请日：2021-01-08

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sukjin KIM ,  Mijin Lee ,  Chanhee Jeon

IPC: H01L27/02

Abstract: An electrostatic discharge (ESD) device having a small size, a low turn-on voltage, and a low on resistance and an ESD protection circuit including the ESD device are provided. The ESD device includes a well formed in a substrate to have a first conductive type, an active region being defined at an upper portion of the substrate, a plurality of fins extending in a first direction to have a structure protruding from the substrate, a first conductive impurity region formed with first conductive impurities, a second conductive impurity region formed with second conductive impurities, and a fin-cut isolation region disposed between the first conductive impurity region and the second conductive impurity region in the first direction to cut each fin, wherein a bottom surface of the fin-cut isolation region is higher than a bottom surface of the active region.

公开(公告)号：US20240235189A9

公开(公告)日：2024-07-11

申请号：US18227599

申请日：2023-07-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sukjin KIM ,  Sangyoung CHO ,  Eonguk KIM ,  Chanhee JEON

IPC: H02H9/04

CPC classification number: H02H9/046

Abstract: An electrostatic discharge clamp circuit includes a resistor connected between a first node and a second node, a first capacitor connected between the second node and a third node, a second capacitor connected between a fourth node and the third node, a third capacitor connected between a fifth node and the third node, a first inverter providing a power supply voltage or a voltage of the fourth node based on a voltage of the second node, a second inverter providing an output voltage of the first inverter or a voltage of the fifth node based on the voltage of the fourth node, a third inverter configured to provide an output voltage of the second inverter or the ground voltage based on the voltage of the fifth node.

公开(公告)号：US20190278828A1

公开(公告)日：2019-09-12

申请号：US16295599

申请日：2019-03-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Younghwan PARK ,  Kyounghoon KIM ,  Dongkwan SUH ,  Hansu CHO ,  Keshava PRASAD NAGARAJA ,  Sukjin KIM ,  Hyunjung KIM

IPC: G06F17/15

Abstract: An electronic apparatus is provided. The electronic apparatus includes a storage storing object data and kernel data, and a processor including a plurality of processing elements arranged in a matrix formation, wherein the processor is configured to input corresponding first elements among a plurality of first elements included in the object data into processing elements arranged in a first row among the plurality of processing elements, and input a plurality of second elements included in the kernel data sequentially into the processing elements arranged in the first row to perform operations between the corresponding first elements and the plurality of second elements, to identify a depth in which a first element and a second element have a non-zero value, and to input the first element and the second element corresponding to the identified depth into a calculator included in each of the processing elements arranged in the first row to perform a convolution operation.

公开(公告)号：US20250096138A1

公开(公告)日：2025-03-20

申请号：US18739664

申请日：2024-06-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jaeha LEE ,  Sukjin KIM ,  Sangdo PARK ,  Yongho LEE ,  Hongmook CHOI

IPC: H01L23/528 ,  H01L27/092

Abstract: Provided is an integrated circuit including a complementary field effect transistor including a first transistor and a second transistor arranged in a vertical direction on a front side of a substrate, a via structure extending in the vertical direction on the second transistor and interconnecting a source/drain of the second transistor to a source/drain of the first transistor, at least one frontside power rail disposed above the first transistor in the vertical direction and transmitting a first supply voltage to the first transistor, a backside via penetrating through the substrate in the vertical direction, and at least one backside power rail disposed on a back side of the substrate and transmitting a second supply voltage to the second transistor through the backside via, wherein the first supply voltage and the second supply voltage have different voltage levels, and the first transistor and the second transistor share a gate line.

公开(公告)号：US20240136813A1

公开(公告)日：2024-04-25

申请号：US18227599

申请日：2023-07-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sukjin KIM ,  Sangyoung CHO ,  Eonguk KIM ,  Chanhee JEON

IPC: H02H9/04

CPC classification number: H02H9/046

Abstract: An electrostatic discharge clamp circuit includes a resistor connected between a first node and a second node, a first capacitor connected between the second node and a third node, a second capacitor connected between a fourth node and the third node, a third capacitor connected between a fifth node and the third node, a first inverter providing a power supply voltage or a voltage of the fourth node based on a voltage of the second node, a second inverter providing an output voltage of the first inverter or a voltage of the fifth node based on the voltage of the fourth node, a third inverter configured to provide an output voltage of the second inverter or the ground voltage based on the voltage of the fifth node.