公开(公告)号：US20230378027A1

公开(公告)日：2023-11-23

申请号：US18113133

申请日：2023-02-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Suhyeong CHOI ,  Jiwook Kwon ,  Byungju Kang ,  Chulhong Park ,  Kwanyoung Chun

IPC: H01L23/48 ,  H01L23/522

CPC classification number: H01L23/481 ,  H01L23/5226

Abstract: A semiconductor device includes: a semiconductor substrate having power arrangement regions; a first interconnection structure disposed on the semiconductor substrate and including first interconnection patterns and power lines; a second interconnection structure disposed on the semiconductor substrate and including second interconnection patterns; and through-electrodes passing through each of the power arrangement regions and contacting the power lines, wherein the first interconnection patterns include first interconnection lines, wherein the power lines are disposed on a same height level as a first interconnection line, among the first interconnection lines, and are parallel to each other, wherein the power arrangement regions are parallel to each other, and wherein intersection regions, in which the power arrangement regions and the power lines intersect, include a plurality of first active intersection regions, one dummy intersection region, and a plurality of second active intersection regions, sequentially arranged.