公开(公告)号：US20240153889A1

公开(公告)日：2024-05-09

申请号：US18386281

申请日：2023-11-02

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hankyung Kim ,  Seungkwon Lee

IPC: H01L23/58 ,  H01L21/768 ,  H01L23/48 ,  H01L23/528

CPC classification number: H01L23/585 ,  H01L21/76898 ,  H01L23/481 ,  H01L23/528

Abstract: Provided is an integrated circuit including a plurality of blocks, wherein each of the plurality of blocks includes devices formed in an device layer between a front-side wiring layer and a backside wiring layer, and a block guard-ring surrounding the devices, wherein the block guard-ring includes a first through silicon via extending from a first backside pattern of the backside wiring layer toward the front-side wiring layer, wherein the first backside pattern is configured to apply a first supply voltage or a second supply voltage provided to at least one of the devices.

公开(公告)号：US20250151266A1

公开(公告)日：2025-05-08

申请号：US18781217

申请日：2024-07-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyojoon An ,  Seungkwon Lee

IPC: H10B20/25

Abstract: An integrated circuit includes a one-time programmable (OTP) bit cell including a program transistor and a read transistor arranged on an active region extending on a front side of a substrate in a first direction, a first backside gate contact penetrating the substrate in a vertical direction and overlapped by the active region, a backside wiring layer arranged on a backside of the substrate and connected to a first gate of the program transistor via the first backside gate contact to transfer a program word line signal to the first gate, and a front side wiring layer arranged above the front side of the substrate and including a first front side wiring pattern connected to a second gate of the read transistor to transfer a read word line signal to the second gate.

公开(公告)号：US20250098327A1

公开(公告)日：2025-03-20

申请号：US18810817

申请日：2024-08-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hankyung Kim ,  Hana Kim ,  Seungkwon Lee ,  Jiye Lee ,  Yeonil Jung

IPC: H01L27/02 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/78 ,  H01L29/786

Abstract: An integrated circuit includes devices arranged in a grid configuration and a first metal layer on the devices, wherein the grid includes first grid lines arranged in a first direction based on a first pitch and extending in a second direction, and second grid lines arranged in the second direction based on a second pitch and extending in the first direction. At least one of the plurality of devices includes gate lines extending in the second direction and having the first pitch, and the first metal layer includes first metal lines extending in the first direction and having the second pitch.