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公开(公告)号:US20170213312A1
公开(公告)日:2017-07-27
申请号:US15407980
申请日:2017-01-17
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Sangoak WOO , Jongpil SON , Seungcheol BAEK , Soojung RYU
Abstract: A computing system includes a memory device comprising a memory array and an internal processor configured to perform a first sub pipeline of a graphics pipeline for tile-based rendering by using graphics data stored in the memory array, for offload processing of the first sub pipeline from a host processor; and the host processor configured to perform a second sub pipeline of the graphics pipeline by using a result of the first sub pipeline stored in the memory array.