公开(公告)号：US20240280895A1

公开(公告)日：2024-08-22

申请号：US18381773

申请日：2023-10-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jinnam YEEM ,  Hoin LEE ,  Dongkyun LEE ,  Sangchul YANG ,  Byung-Hyun LEE

IPC: G03F1/70 ,  H01L21/027

CPC classification number: G03F1/70 ,  H01L21/027 ,  H10B12/315

Abstract: A method of fabricating a semiconductor device may include forming a target pattern on a first wafer by performing a first exposure process, measuring a misalignment value of the target pattern, calculating a block misalignment value and a pattern misalignment value based on the misalignment value, calculating a block correction value based on the block misalignment value and calculating a pattern correction value based on the pattern misalignment value, and performing a second exposure process on a second wafer, based on the block correction value and the pattern correction value.