公开(公告)号：US20250029942A1

公开(公告)日：2025-01-23

申请号：US18596286

申请日：2024-03-05

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Raeyoung KANG ,  MINKI KIM ,  JIHOON KIM ,  JINKYEONG SEOL

IPC: H01L23/00 ,  H01L23/48

Abstract: A semiconductor package includes a lower structure and an upper structure on the lower structure. The lower structure includes a first substrate, a first through-electrode penetrating the first substrate in a first direction, a first pad connected to the first through-electrode, and a first protective layer surrounding the first pad. The upper structure includes a second substrate, a second through-electrode penetrating the second substrate in the first direction, a second pad connected to the second through-electrode, and a second protective layer surrounding the second pad. The second pad is offset from the first pad in a second direction crossing the first direction. The first pad has a first portion not overlapping the second pad. A first barrier pattern is disposed between the first portion and the second protective layer. A portion of the first barrier pattern is disposed between the first pad and the second pad.

公开(公告)号：US20250140723A1

公开(公告)日：2025-05-01

申请号：US18671443

申请日：2024-05-22

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jihoon KIM ,  Jinkyeong SEOL ,  Raeyoung KANG ,  Minki KIM ,  Hyeonkyu HA

IPC: H01L23/00 ,  H01L23/48 ,  H01L25/065 ,  H10B80/00

Abstract: A semiconductor package includes a plurality of semiconductor chips bonded to each other through direct bonding, the plurality of semiconductor chips including a first semiconductor chip and a second semiconductor chip. The first semiconductor chip including: a front insulating layer bonded to a back insulating layer of the second semiconductor chip; a front pad surrounded by the front insulating layer; a device layer on a back surface of the front insulating layer and including an interconnection structure electrically connected to the front pad; a conductive pattern between the interconnection structure and the front pad; and a support insulating layer between the device layer and the front insulating layer and surrounding the conductive pattern, wherein a gap is between a first side surface of the support insulating layer and a second side surface of the conductive pattern that faces the first side surface.