公开(公告)号：US20140266371A1

公开(公告)日：2014-09-18

申请号：US14199139

申请日：2014-03-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae Kwang JANG ,  Jen Lung LIU ,  Nan XING ,  Jae Jin PARK

IPC: H03K5/15

CPC classification number: H03K5/15 ,  H03K5/1504 ,  H03K5/1508

Abstract: A multi-phase generator includes an oscillator unit including a plurality of first buffer units forming a single closed loop and a delay unit including a plurality of second buffer units respectively connected to a plurality of nodes, wherein each of the plurality of nodes is connected between two adjacent buffer units of the first buffer units. A phase of an output signal of a second buffer unit, among the second buffer units, lags behind a phase of an output signal of a first buffer unit, among the first buffer units.

Abstract translation: 多相发生器包括：振荡器单元，包括形成单个闭环的多个第一缓冲单元和包括分别连接到多个节点的多个第二缓冲单元的延迟单元，其中多个节点中的每一个连接在 第一缓冲单元的两个相邻缓冲单元。 在第一缓冲单元中，第二缓冲单元中的第二缓冲单元的输出信号的相位滞后于第一缓冲单元的输出信号的相位。

公开(公告)号：US20140266137A1

公开(公告)日：2014-09-18

申请号：US14203797

申请日：2014-03-11

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae Kwang JANG ,  Jen Lung LIU ,  Nan XING ,  Jae Jin PARK

IPC: G05F3/08

CPC classification number: G05F3/242 ,  G05F3/26

Abstract: A current generator includes a first current generation circuit configured to generate a first current having a first current noise which depends on a change in a supply voltage, a second current generation circuit configured to generate a second current having a second current noise which depends on the change in the supply voltage, and a current subtracting circuit configured to generate a third current with the first current noise and the second current noise removed by subtracting the second current from the first current.

Abstract translation: 电流发生器包括第一电流产生电路，其被配置为产生具有取决于电源电压变化的第一电流噪声的第一电流;第二电流产生电路，被配置为产生具有第二电流噪声的第二电流，该第二电流噪声依赖于 电流减法电路，其被配置为通过从第一电流中减去第二电流而产生具有第一电流噪声和第二电流噪声的第三电流。

公开(公告)号：US20140191787A1

公开(公告)日：2014-07-10

申请号：US14108834

申请日：2013-12-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Nan XING ,  Jaejin PARK ,  Jenlung LIU ,  Tae-Kwang JANG

IPC: H03L7/089

CPC classification number: H03L7/093 ,  H03L7/0895

Abstract: A phase locked loop circuit is provided which includes a bang-bang phase frequency detector configured to receive a reference signal and a feedback signal, detect a phase difference between the reference signal and the feedback signal, output a detection signal on the based on a result of the detection; an analog-digital mixed filter configured to receive the detection signal and output a control signal on the basis of the received detection signal; a voltage controlled oscillator configured to output an output signal in response to the control signal; and a divider configured to divide the output signal by n to output as the feedback signal. The detection signal is a digital signal, and the control signal is an analog signal.

Abstract translation: 提供了一种锁相环电路，其包括一个轰击相位频率检测器，配置为接收参考信号和反馈信号，检测参考信号和反馈信号之间的相位差，基于结果输出检测信号 的检测; 模拟数字混合滤波器，被配置为接收检测信号并根据接收到的检测信号输出控制信号; 被配置为响应于所述控制信号输出输出信号的压控振荡器; 以及分频器，被配置为将输出信号除以n作为反馈信号输出。 检测信号是数字信号，控制信号是模拟信号。