公开(公告)号：US20240047550A1

公开(公告)日：2024-02-08

申请号：US18182426

申请日：2023-03-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Ki Heun LEE ,  Yong Seok KIM ,  Hyun Cheol KIM ,  Dae Won HA

IPC: H01L29/51 ,  H01L29/417 ,  H01L29/78

CPC classification number: H01L29/516 ,  H01L29/41725 ,  H01L29/78391

Abstract: Provided are semiconductor devices. The semiconductor device includes a substrate, a gate structure disposed on the substrate and extending in a first direction, and an active pattern spaced apart from the substrate in a second direction, extending in a third direction, and penetrating the gate structure, wherein the active pattern includes a two-dimensional material, the gate structure comprises a gate insulating layer, a lower gate conductive layer, a ferroelectric layer, and an upper gate conductive layer, which are sequentially stacked on the active pattern, the gate insulating layer includes hexagonal boron nitride (h-BN), and the ferroelectric layer includes a bilayer of a two-dimensional material.