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公开(公告)号:US11594544B2
公开(公告)日:2023-02-28
申请号:US16942456
申请日:2020-07-29
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyojoon Ryu , Younghwan Son , Seogoo Kang , Jesuk Moon , Junghoon Jun , Kohji Kanamori , Jeehoon Han
IPC: H01L27/1157 , H01L27/11582 , H01L27/11573 , H01L27/11565
Abstract: A semiconductor device includes; gate layers stacked on a substrate, a channel layer extending through the gate layers, a string select gate layer disposed on the channel layer and a string select channel layer extending through the string select gate layer to contact the channel layer. The string select channel layer includes a first portion below the string select gate layer including a first protruding region, a second portion extending through the string select gate layer, and a third portion above the string select gate layer including a second protruding region.
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公开(公告)号:US12268004B2
公开(公告)日:2025-04-01
申请号:US18103070
申请日:2023-01-30
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyojoon Ryu , Younghwan Son , Seogoo Kang , Jesuk Moon , Junghoon Jun , Kohji Kanamori , Jeehoon Han
Abstract: A semiconductor device includes; gate layers stacked on a substrate, a channel layer extending through the gate layers, a string select gate layer disposed on the channel layer and a string select channel layer extending through the string select gate layer to contact the channel layer. The string select channel layer includes a first portion below the string select gate layer including a first protruding region, a second portion extending through the string select gate layer, and a third portion above the string select gate layer including a second protruding region.
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公开(公告)号:US20250071994A1
公开(公告)日:2025-02-27
申请号:US18767830
申请日:2024-07-09
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Kohji Kanamori , Seogoo Kang , Kyungdong Kim , Seunghyun Lee , Junghoon Jun , Jeehoon Han , Taeyoon Hong
Abstract: A semiconductor device includes a gate electrode structure, a memory channel structure, and a first contact plug. The gate electrode structure is disposed on a substrate, and includes gate electrodes spaced apart from each other in a first direction substantially perpendicular to an upper surface of the substrate. Each of the gate electrode extends in a second direction substantially parallel to the upper surface of the substrate. The memory channel structure extends through the gate electrode structure on the substrate. The first contact plug extends in the first direction on the substrate through and contacting a corresponding one of the gate electrodes, and a portion of a sidewall of the first contact plug at substantially the same level as the corresponding one of the gate electrodes is not surrounded by the corresponding one of the gate electrodes.
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