公开(公告)号：US20240266402A1

公开(公告)日：2024-08-08

申请号：US18393009

申请日：2023-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Taegon KIM ,  Jihye YI ,  Yonghee PARK ,  Sanghoon HAN

IPC: H01L29/15 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/155 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66553 ,  H01L29/775 ,  H01L29/78696

Abstract: Provided is a semiconductor device, including a substrate, a first active pattern on the substrate, a first channel pattern on the first active pattern, the first channel pattern including a first semiconductor pattern and a second semiconductor pattern on the first semiconductor pattern, a first source/drain pattern connected to the first channel pattern, and a gate electrode on the first channel pattern, wherein each of the first semiconductor pattern and the second semiconductor pattern includes a plurality of semiconductor layers, and at least one superlattice layer between adjacent semiconductor layers among the plurality of semiconductor layers, wherein the at least one superlattice layer included in the first semiconductor pattern has a first length, wherein the at least one superlattice layer included in the second semiconductor pattern has a second length, and wherein the first length is greater than the second length.